Cortex-A8 R2P2.pdf - ARM Information Center

System Control CoprocessorTo perform a HVAB operation, read or write CP15 with:MCR p15 0, , c15, c0, 5 ; D-L1 HVAB writeMCR p15 0, , c15, c2, 5 ; D-L1 HVAB readMCR p15 0, , c15, c1, 5 ; I-L1 HVAB writeMCR p15 0, , c15, c3, 5 ; I-L1 HVAB readTable 3-152 shows how the bit values correspond with the I-L1 or D-L1 Data 0 Registeras a result of an L1 tag array read/write operation.Table 3-152 Functional bits of I-L1 or D-L1 Data 0 Register for an L1 tag array operationBits Field Function[31:23] - Reserved. UNP, SBZ.[22:0] Data Holds L1 tag array information.To perform a tag operation, read or write CP15 with:MCR p15 0, , c15, c0, 6 ; D-L1 tag writeMCR p15 0, , c15, c2, 6 ; D-L1 tag readMCR p15 0, , c15, c1, 6 ; I-L1 tag writeMCR p15 0, , c15, c3, 6 ; I-L1 tag readTable 3-153 shows how the bit values correspond with the I-L1 or D-L1 Data 0 Registeras a result of an L1 data array read/write operation.Table 3-153 Functional bits of I-L1 or D-L1 Data 0 Register for L1 data array operationBits Field Function[31:0] Data Holds L1 data array information.Table 3-154 shows how the bit values correspond with the I-L1 or D-L1 Data 1 Registeras a result of an L1 data array read/write operation.Table 3-154 Functional bits of I-L1 or D-L1 Data 1 Register for L1 data array operationBits Field Function[30:6] - Reserved. UNP, SBZ.[5:0] Data Holds L1 data array information.To perform a data operation on the Data 0 or Data 1 Register, read or write CP15 with:MCR p15 0, , c15, c0, 7 ; D-L1 data writeARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. 3-167