Cortex-A8 R2P2.pdf - ARM Information Center

NEON and VFP Programmer’s Model13.4 System registersThe VFPv3 architecture describes the following system registers:• Floating-Point System ID Register, FPSID on page 13-13• Floating-Point Status and Control Register, FPSCR on page 13-14• Floating-point exception Register, FPEXC on page 13-17• Media and VFP Feature Registers, MVFR0 and MVFR1 on page 13-18.Table 13-5 shows the NEON and VFP system registers.Table 13-5 NEON and VFP system registersRegister FMXR/FMRX field Access type Reset stateFloating-Point System ID Register, FPSID b0000 Read-only 0x410330c2Floating-Point Status and Control Register, FPSCR b0001 Read/write 0x00000000Floating-Point Exception Register, FPEXC b1000 Read/write 0x00000000Media and VFP Feature Register 0, MVFR0 b0111 Read-only 0x11110222Media and VFP Feature Register 1, MVFR1 b0110 Read-only 0x00011111NoteThe FPSID, MVFR0, and MVFR1 Registers are read-only. Attempts to write theseregisters are ignored.Table 13-6 shows the processor modes for accessing the NEON and VFP systemregisters.Table 13-6 Accessing NEON and VFP system registersRegister Privileged access User accessFPEXC.EN=0 FPEXC.EN=1 FPEXC.EN=0 FPEXC.EN=1FPSID Permitted Permitted Not permitted Not permittedFPSCR Not permitted Permitted Not permitted PermittedMVFR0, MVFR1 Permitted Permitted Not permitted Not permittedFPEXC Permitted Permitted Not permitted Not permitted13-12 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E