Cortex-A8 R2P2.pdf - ARM Information Center

System Control CoprocessorThe system control coprocessor controls the Security Extensions operation of theprocessor:• some of the registers are only accessible in the Secure state• some of the registers are banked for Secure and Nonsecure states• some of the registers are common to Secure and Nonsecure states.NoteWhen Monitor mode is active, the core is in the Secure state. The processor treats allaccesses as secure and the system control coprocessor behaves as if it operates in theSecure state regardless of the value of the NS bit, see c1, Secure Configuration Registeron page 3-69. In Monitor mode the NS bit defines which copies of the banked registersin the system control coprocessor the processor can access:NS = 0 Access to Secure state CP15 registers.NS = 1 Access to Nonsecure state CP15 registers.Registers that are only accessible in the Secure state are always accessible in Monitormode, regardless of the value of the NS bit.Table 3-1 shows the overall functionality of the system control coprocessor registers.Table 3-1 System control coprocessor register functionsFunction Register/operation Reference to descriptionSystem controland configurationControl c1, Control Register on page 3-58Auxiliary Control c1, Auxiliary Control Register on page 3-61Secure Configuration c1, Secure Configuration Register on page 3-69Secure Debug Enable c1, Secure Debug Enable Register on page 3-71Nonsecure Access Control c1, Nonsecure Access Control Register on page 3-73Coprocessor Access Control c1, Coprocessor Access Control Register on page 3-67Secure or Nonsecure Vector BaseAddressc12, Secure or Nonsecure Vector Base Address Register onpage 3-153Monitor Vector Base Address c12, Monitor Vector Base Address Register on page 3-155Main ID Register a c0, Main ID Register on page 3-25Silicon ID Register c0, Silicon ID Register on page 3-53Product Features c0, Memory Model Feature Register 0 on page 3-35 - c0,Instruction Set Attributes Registers 5-7 on page 3-52ARM DDI 0344E Copyright © 2006-2008 ARM Limited. All rights reserved. 3-3