Cortex-A8 R2P2.pdf - ARM Information Center

GlossaryRemappingReservedRounding modeChanging the address of physical memory or devices after the application has startedexecuting. This is typically done to permit RAM to replace ROM when the initializationhas been completed.A field in a control register or instruction format is reserved if the field is to be definedby the implementation, or produces Unpredictable results if the contents of the field arenot zero. These fields are reserved for use in future extensions of the architecture or areimplementation-specific. All reserved bits not used by the implementation must bewritten as 0 and read as 0.The IEEE 754 standard requires all calculations to be performed as if to an infiniteprecision. For example, a multiply of two single-precision values must accuratelycalculate the significand to twice the number of bits of the significand. To represent thisvalue in the destination precision, rounding of the significand is often required. TheIEEE 754 standard specifies four rounding modes.In round-to-nearest mode, the result is rounded at the halfway point, with the tie caserounding up if it would clear the least significant bit of the significand, making it even.Round-towards-zero mode chops any bits to the right of the significand, alwaysrounding down, and is used by the C, C++, and Java languages in integer conversions.Round-towards-plus-infinity mode and round-towards-minus-infinity mode are used ininterval arithmetic.RunFast modeRunFast mode speeds up floating-point computations by flushing subnormal inputs andoutputs to zero, and enabling the default NaN mode.Saved Program Status Register (SPSR)The register that holds the CPSR of the task immediately before the exception occurredthat caused the switch to the current mode.SBOSBZSBZPScalar operationSee Should-Be-One.See Should-Be-Zero.See Should-Be-Zero or Preserved.A VFP coprocessor operation involving a single source register and a single destinationregister.See also Vector operation.Scan chainA scan chain is made up of serially-connected devices that implement boundary scantechnology using a standard JTAG TAP interface. Each device contains at least one TAPcontroller containing shift registers that form the chain connected between TDI andTDO, through which test data is shifted. Processors can contain several shift registersto enable you to access selected parts of the device.Glossary-18 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E