Cortex-A8 R2P2.pdf - ARM Information Center

GlossaryData AbortAn indication from a memory system to the core of an attempt to access an illegal datamemory location. An exception must be taken if the processor attempts to use the datathat caused the abort.See also Abort, External Abort, and Prefetch Abort.Data cacheDebuggerDefault NaN modeDirect-mapped cacheA block of on-chip fast access memory locations, situated between the processor andmain memory, used for storing and retrieving copies of often used data. This is done togreatly increase the average speed of memory accesses and so improve processorperformance.A debugging system that includes a program, used to detect, locate, and correct softwarefaults, together with custom hardware that supports software debugging.A mode in which all operations that result in a NaN return the default NaN, regardlessof the cause of the NaN result. This mode is compliant with the IEEE 754 standard butimplies that all information contained in any input NaNs to an operation is lost.A one-way set-associative cache. Each cache set consists of a single cache line, so cachelook-up selects and checks a single cache line.Direct Memory Access (DMA)An operation that accesses main memory directly, without the processor performing anyaccesses to the data concerned.DirtyA cache line in a write-back cache that has been modified while it is in the cache is saidto be dirty. A cache line is marked as dirty by setting the dirty bit. If a cache line is dirty,it must be written to memory on a cache miss because the next level of memory containsdata that has not been updated. The process of writing dirty data to main memory iscalled cache cleaning.See also Clean.DMADNMDo Not Modify (DNM)See Direct Memory Access.See Do Not Modify.In Do Not Modify fields, the value must not be altered by software. DNM fields read asUnpredictable values, and must only be written with the same value read from the samefield on the same processor. DNM fields are sometimes followed by RAZ or RAO inparentheses to show which way the bits must read for future compatibility, butprogrammers must not rely on this behavior.Glossary-10 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E