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Cortex-A8 R2P2.pdf - ARM Information Center

Cortex-A8 R2P2.pdf - ARM Information Center

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System Control CoprocessorEach CPEXIST input represents the existence of a coprocessor that you use toenable a particular coprocessor. If the appropriate CPEXIST input is set to a:— logical 0, access is denied to that coprocessor or reset state as defined by theregister— logical 1, then you can reprogram that coprocessor.• You must enable the Coprocessor Access Control Register before accessing anyNEON or VFP system register.• You must set CPEXIST[11:10] to b11 to use the NEON or VFP coprocessor. Allother CPEXIST bits must be set to 0.• You must set CPEXIST[11:10] to b00 if you configure the processor without theNEON coprocessor.3.2.28 c1, Secure Configuration RegisterThe purpose of the Secure Configuration Register is to define:• the current state of the processor as Secure or Nonsecure states• in which state the core executes exceptions• the ability to modify the A and I bits in the CPSR in the Nonsecure state.The Secure Configuration Register is:• a read/write register• accessible in secure privileged modes only.Figure 3-23 shows the bit arrangement of the Secure Configuration Register.31 6 5 4 3 2 1 0F IA F E NReservedI RW W A SQ QFigure 3-23 Secure Configuration Register format<strong>ARM</strong> DDI 0344E Copyright © 2006-2008 <strong>ARM</strong> Limited. All rights reserved. 3-69

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