Cortex-A8 R2P2.pdf - ARM Information Center

Clock, Reset, and Power ControlPowering down the NEON power domain while the processor is in resetTo power down the NEON power domain while the processor is in reset, apply thefollowing sequence:1. Assert both ARESETn and ARESETNEONn to place the processor in reset.You must assert ARESETn and ARESETNEONn for at least eight CLK cyclesbefore activating the NEON clamps.2. Activate the NEON output clamps by asserting the CLAMPNEONOUT inputHIGH.3. Remove power from the NEON power domain.4. Deassert ARESETn, but continue to assert ARESETNEONn.If the processor is executing a power-on reset sequence or is first powering up:1. Assert both ARESETn and ARESETNEONn. You must assert ARESETn andARESETNEONn for at least eight CLK cycles before activating the NEONclamps.2. Activate the NEON output clamps by asserting the CLAMPNEONOUT inputHIGH.3. While keeping the NEON power domain off, supply power to the other activepower domains.4. Deassert ARESETn, but continue to assert ARESETNEONn.While ARESETNEONn remains asserted, all Advanced SIMD instructions cause anUndefined Instruction exception.NoteIf ARESETNEONn is deasserted or the NEON output clamps are released withoutfollowing one of the specified NEON power-up sequences, the results areUnpredictable and might cause the processor to deadlock.10-20 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E