Cortex-A8 R2P2.pdf - ARM Information Center

Cross Trigger InterfaceTable 15-13 shows how the bit values correspond with the CTICHINSTATUS Registerfunctions.Table 15-13 CTI Channel In Status Register bit functionsBits Field Function[31:4] - Reserved, RAZ.[3:0] CTICHINSTATUS Displays the status of the CTICHIN inputs:0 = CTICHIN is inactive1 = CTICHIN is active.Because the register provides a view of the raw CTICHIN inputs from the CTM, the resetvalue is unknown. There is one bit of the register for each channel input.15.6.11 CTI Channel Gate Register, CTICHGATEThe CTICHGATE Register is a read/write register that controls the propagation ofevents to the channel interface. Figure 15-14 shows the bit arrangement of theCTICHGATE Register.31 4 3 2 1 0ReservedCTICHGATE3CTICHGATE2CTICHGATE1CTICHGATE0Figure 15-14 CTI Channel Gate Register formatTable 15-14 shows how the bit values correspond with the CTICHGATE Registerfunctions.Table 15-14 CTI Channel Gate Register bit functionsBits Field Function[31:4] - Reserved. RAZ, SBZ.[3] CTICHGATE3 Enable CTICHOUT3. Set to 0 to disable channel propagation.15-20 Copyright © 2006-2008 ARM Limited. All rights reserved. ARM DDI 0344E