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Cortex-A8 R2P2.pdf - ARM Information Center

Cortex-A8 R2P2.pdf - ARM Information Center

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DebugSee Debug communications channel on page 12-95 for details on the use of theseregisters with the DTRRXfull and DTRTXfull flags. Figure 12-6 shows the bitarrangement of both the DTRRX and DTRTX.31 0DataFigure 12-6 DTR Register formatTable 12-15 shows how the bit values correspond with the DTRRX and DTRTXfunctions.Table 12-15 Data Transfer Register bit functionsBitsFieldFunction[31:0] - Data Transfer Register - receive (read-only for the CP14 interface).NoteReads of the DTRRX through the coprocessor interface cause the DTRRXfull flag to be cleared to 0.However, reads of the DTRRX through the APB interface do not affect this flag.[31:0] - Data Transfer Register - transmit (write-only for the CP14 interface).NoteWrites to the DTRTX through the coprocessor interface cause the DTRTXfull flag to be set to 1.However, writes to the DTRTX through the APB interface do not affect this flag.12.4.7 Watchpoint Fault Address RegisterThe WFAR is a read/write register that holds the virtual address of the instruction thattriggers the watchpoint.12-30 Copyright © 2006-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0344E

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