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Cortex-A8 R2P2.pdf - ARM Information Center

Cortex-A8 R2P2.pdf - ARM Information Center

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DebugBits Field FunctionTable 12-23 shows how the bit values correspond with the Breakpoint Control Registersfunctions.[31:29] - Reserved. RAZ, SBZP.Table 12-23 Breakpoint Control Registers bit functions[28:24] Breakpointaddress maskBreakpoint address mask. This field is used to set a breakpoint on a range of addresses bymasking lower order address bits out of the breakpoint comparison. ab00000 = no maskb00001 = reservedb00010 = reservedb00011 = 0x00000007 mask for instruction addressb00100 = 0x0000000F mask for instruction addressb00101 = 0x0000001F mask for instruction address...b11111 = 0x7FFFFFFF mask for instruction address.[23] - Reserved. RAZ, SBZP.[22:20] M Meaning of BVR:b000 = instruction virtual address matchb001 = linked instruction virtual address matchb010 = unlinked context IDb011 = linked context IDb100 = instruction virtual address mismatchb101 = linked instruction virtual address mismatchb11x = reserved.NoteBCR0[21], BCR1[21], BCR2[21], and BCR3[21] are RAZ because these registers do nothave context ID comparison capability.<strong>ARM</strong> DDI 0344E Copyright © 2006-2008 <strong>ARM</strong> Limited. All rights reserved. 12-39

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