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Cortex-A8 R2P2.pdf - ARM Information Center

Cortex-A8 R2P2.pdf - ARM Information Center

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GlossaryCache wayA group of cache lines (or blocks). It is 2 to the power of the number of index bits in size.See also Cache terminology diagram on the last page of this glossary.CAMCast outCDP instructionSee Content Addressable Memory.See Victim.Coprocessor data processing instruction. For the VFP coprocessor, CDP instructions arearithmetic instructions and FCPY, FABS, and FNEG.See also Arithmetic instruction.CleanA cache line that has not been modified while it is in the cache is said to be clean. Toclean a cache is to write dirty cache entries into main memory. If a cache line is clean,it is not written on a cache miss because the next level of memory contains the samedata as the cache.See also Dirty.Clock gatingCoherencyCold resetGating a clock signal for a macrocell with a control signal and using the modified clockthat results to control the operating state of the macrocell.See Memory coherency.Also known as power-on reset. Starting the processor by turning power on. Turningpower off and then back on again clears main memory and many internal settings. Someprogram failures can lock up the processor and require a cold reset to enable the systemto be used again. In other cases, only a warm reset is required.See also Warm reset.Communications channelThe hardware used for communicating between the software running on the processor,and an external host, using the debug interface. When this communication is for debugpurposes, it is called the Debug Comms Channel. In an <strong>ARM</strong>v7 compliant core, thecommunications channel includes the Data Transfer Register, some bits of the DataStatus and Control Register, and the external debug interface controller, such as theDBGTAP controller in the case of the JTAG interface.Conditional executionIf the condition code flags indicate that the corresponding condition is true when theinstruction starts executing, it executes normally. Otherwise, the instruction doesnothing.Content Addressable Memory (CAM)Memory that is identified by its contents. Content Addressable Memory is used inCAM-RAM architecture caches to store the tags for cache entries.Glossary-8 Copyright © 2006-2008 <strong>ARM</strong> Limited. All rights reserved. <strong>ARM</strong> DDI 0344E

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