Operating Manual EMI TEST RECEIVER ESIB7 - Rohde & Schwarz

Status Reporting System
ESIB
STATus QUEStionable:ACPLimit Register
This register Tcomprises information about the observance of limits during adjacent power
measurements. It can be queried with commands ’STATus:QUEStionable:ACPLimit
:CONDition?’ and ’STATus:QUEStionable:ACPLimit[:EVENt]?’
Table 5-
Meaning of bits in STATus:QUEStionable:ACPLimit register
Bit No.
Meaning
0 ADJ UPPer FAIL(Screen A)
This bit is set if the limit is exceeded in the upper adjacent channel.
1 ADJ LOWer FAIL (Screen A)
This bit is set if the limit is exceeded in the lower adjacent channel.
2 ALT1 UPPer FAIL (Screen A)
This bit is set if the limit is exceeded in the upper 1st alternate channel.
3 ALT1 LOWer FAIL (Screen A)
This bit is set if the limit is exceeded in the lower 1st alternate channel.
4 ALT2 UPPer FAIL (Screen A)
This bit is set if the limit is exceeded in the upper 2nd alternate channel.
5 ALT2 LOWer FAIL (Screen A)
This bit is set if the limit is exceeded in the lower 2nd alternate channel.
6 not used
7 not used
8 ADJ UPPer FAIL (Screen B)
This bit is set if the limit is exceeded in the upper adjacent channel.
9 ADJ LOWer FAIL (Screen B)
This bit is set if the limit is exceeded in the lower adjacent channel.
10 ALT1 UPPer FAIL (Screen B)
This bit is set if the limit is exceeded in the upper 1st alternate channel.
11 ALT1 LOWer FAIL (Screen B)
This bit is set if the limit is exceeded in the lower 1st alternate channel.
12 ALT2 UPPer FAIL (Screen B)
This bit is set if the limit is exceeded in the upper 2nd alternate channel.
13 ALT2 LOWer FAIL (Screen A)
This bit is set if the limit is exceeded in the lower 2nd alternate channel.
14 not used
15 This bit is always 0.
1088.7531.12 5.24 E-16