Configuration Handbook - Kamami.pl

Fast Passive Parallel Configurationentered user mode. When initialization is complete, the device enters usermode. In user-mode, the user I/O pins no longer have weak pull-upresistors and function as assigned in your design.To ensure DCLK and DATA[7..0] are not left floating at the end ofconfiguration, the MAX II device must drive them either high or low,whichever is convenient on your board. The DATA[7..0] pins areavailable as user I/O pins after configuration. When you select the FPPscheme in the Quartus II software, as a default, these I/O pins aretri-stated in user mode. To change this default option in the Quartus IIsoftware, select the Pins tab of the Device & Pin Options dialog box.The configuration clock (DCLK) speed must be below the specifiedfrequency to ensure correct configuration. No maximum DCLK periodexists, which means you can pause configuration by halting DCLK for anindefinite amount of time.1 If you are using the Stratix II or Stratix II GX decompressionand/or design security feature and need to stop DCLK, it canonly be stopped three clock cycles after the last data byte waslatched into the Stratix II or Stratix II GX device.By stopping DCLK, the configuration circuit allows enough clock cycles toprocess the last byte of latched configuration data. When the clockrestarts, the MAX II device must provide data on the DATA[7..0] pinsprior to sending the first DCLK rising edge.If an error occurs during configuration, the device drives its nSTATUS pinlow, resetting itself internally. The low signal on the nSTATUS pin alsoalerts the MAX II device that there is an error. If the Auto-restartconfiguration after error option (available in the Quartus II softwarefrom the General tab of the Device & Pin Options (dialog box) is turnedon, the device releases nSTATUS after a reset time-out period (maximumof 100 µs). After nSTATUS is released and pulled high by a pull-upresistor, the MAX II device can try to reconfigure the target devicewithout needing to pulse nCONFIG low. If this option is turned off, theMAX II device must generate a low-to-high transition (with a low pulseof at least 2 µs) on nCONFIG to restart the configuration process.The MAX II device can also monitor the CONF_DONE and INIT_DONEpins to ensure successful configuration. The CONF_DONE pin must bemonitored by the MAX II device to detect errors and determine whenprogramming completes. If all configuration data is sent, but theCONF_DONE or INIT_DONE signals have not gone high, the MAX IIdevice will reconfigure the target device.7–18 Altera CorporationStratix II Device Handbook, Volume 2 May 2007