Configuration Handbook - Kamami.pl

Passive Serial ConfigurationfThe value of the weak pull-up resistors on the I/O pins that are on beforeand during configuration can be found in the Stratix II Device Handbookor the Stratix II GX Device Handbook.The configuration cycle consists of three stages: reset, configuration, andinitialization. While nCONFIG or nSTATUS are low, the device is in reset.To initiate configuration, the MAX II device must generate a low-to-hightransition on the nCONFIG pin.1 V CCINT , V CCIO , and V CCPD of the banks where the configurationand JTAG pins reside need to be fully powered to theappropriate voltage levels in order to begin the configurationprocess.When nCONFIG goes high, the device comes out of reset and releases theopen-drain nSTATUS pin, which is then pulled high by an external 10-kΩpull-up resistor. Once nSTATUS is released, the device is ready to receiveconfiguration data and the configuration stage begins. When nSTATUS ispulled high, the MAX II device should place the configuration data onebit at a time on the DATA0 pin. If you are using configuration data in RBF,HEX, or TTF format, you must send the least significant bit (LSB) of eachdata byte first. For example, if the RBF contains the byte sequence 02 1BEE 01 FA, the serial bitstream you should transmit to the device is0100-0000 1101-1000 0111-0111 1000-0000 0101-1111.The Stratix II and Stratix II GX devices receive configuration data on theDATA0 pin and the clock is received on the DCLK pin. Data is latched intothe device on the rising edge of DCLK. Data is continuously clocked intothe target device until CONF_DONE goes high. After the device hasreceived all configuration data successfully, it releases the open-drainCONF_DONE pin, which is pulled high by an external 10-kΩ pull-upresistor. A low-to-high transition on CONF_DONE indicates configurationis complete and initialization of the device can begin. The CONF_DONEpin must have an external 10-kΩ pull-up resistor in order for the device toinitialize.In Stratix II and Stratix II GX devices, the initialization clock source iseither the internal oscillator (typically 10 MHz) or the optional CLKUSRpin. By default, the internal oscillator is the clock source for initialization.If the internal oscillator is used, the Stratix II or Stratix II GX deviceprovides itself with enough clock cycles for proper initialization.Therefore, if the internal oscillator is the initialization clock source,sending the entire configuration file to the device is sufficient to configureand initialize the device. Driving DCLK to the device after configuration iscomplete does not affect device operation.7–48 Altera CorporationStratix II Device Handbook, Volume 2 May 2007