Configuration Handbook - Kamami.pl

Device Configuration PinsTable 11–15. Dedicated Configuration Pins on the Stratix or Stratix GX Device (Part 4 of 8)Pin NameUser ModeConfigurationSchemePin TypeCONF_DONE N/A All Bidirectionalopen-drainDescriptionStatus output. The target FPGA drives theCONF_DONE pin low before and duringconfiguration. Once all configuration data isreceived without error and the initializationcycle starts, the target device releasesCONF_DONE.Status input. After all data is received andCONF_DONE goes high, the target deviceinitializes and enters user mode. TheCONF_DONE pin must have an external10-kΩ pull-up resistor in order for the device toinitialize.Driving CONF_DONE low after configurationand initialization does not affect the configureddevice.The enhanced configuration devices’ andEPC2 devices’ OE and nCS pins have optionalinternal programmable pull-up resistors. Ifinternal pull-up resistors on the enhancedconfiguration device are used, external 10-kΩpull-up resistors should not be used on thesepins. When using EPC2 devices, only external10-kΩ pull-up resistors should be used.This pin uses Schmitt trigger input buffers.nCE N/A All Input Active-low chip enable. The nCE pin activatesthe device with a low signal to allowconfiguration. The nCE pin must be held lowduring configuration, initialization, and usermode. In single device configuration, it shouldbe tied low. In multi-device configuration, nCEof the first device is tied low while its nCEO pinis connected to nCE of the next device in thechain.The nCE pin must also be held low forsuccessful JTAG programming of the FPGA.This pin uses Schmitt trigger input buffers.11–54 Altera CorporationStratix Device Handbook, Volume 2 July 2005