Configuration Handbook - Kamami.pl

9. Combining DifferentConfiguration SchemesCF52009-2.2IntroductionThis chapter shows you how to configure Altera ® FPGAs using multipleconfiguration schemes on the same board. Combining JTAGconfiguration with passive serial (PS) or active serial (AS) configurationon your board is useful in the prototyping environment because it allowsmultiple methods to configure your FPGA. For example, if yourproduction environment calls for PS configuration using a configurationdevice, you would have to reprogram your configuration device everytime you wanted to test a design change in your FPGA. If you include theFPGA in the same JTAG chain as the configuration device, the FPGA canbe reconfigure via JTAG without having to reprogram the configurationdevice.In this chapter, the generic term “download cable” includes the AlteraUSB Blaster universal serial bus (USB) port download cable,MasterBlaster TM serial/USB communications cable, EthernetBlaster,ByteBlaster TM II parallel port download cable, and the ByteBlasterMV TMparallel port download cable. In this section, the generic term “FPGA”includes Stratix ® series, Cyclone ® series, APEX TM II, APEX 20K,Mercury TM , ACEX ® 1K, and FLEX ® 10K devices.1 The figures in this chapter will only show the configurationinterface connections. For detailed information about pull-upresistor values or other pins on the specific FPGA orconfiguration device, refer to the appropriate chapter in theConfiguration Handbook.Passive Serial &JTAGFigure 9–1 shows the configuration interface connections when you areusing a download cable to JTAG program a configuration device and theconfiguration device is used to configure the FPGAs. In Figure 9–1,multiple FPGAs are daisy-chained together and the MSEL pins should beset to select PS as the configuration mode.Altera Corporation 9–1April 2007