Configuration Handbook - Kamami.pl

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Configuring Stratix & Stratix GX DevicesFigure 11–24. JTAG TAP Controller State MachineTMS = 1TEST_LOGIC/RESETTMS = 0SELECT_DR_SCANTMS = 1SELECT_IR_SCANTMS = 0RUN_TEST/IDLETMS = 1 TMS = 1TMS = 0TMS = 0TMS = 1CAPTURE_DRTMS = 1CAPTURE_IRTMS = 0TMS = 0SHIFT_DRTMS = 0SHIFT_IRTMS = 0TMS = 1TMS = 1EXIT1_DRTMS = 1 TMS = 1EXIT1_IRTMS = 0TMS = 0PAUSE_DRTMS = 0PAUSE_IRTMS = 0TMS = 1TMS = 1TMS = 0EXIT2_DRTMS = 0EXIT2_IRTMS = 1TMS = 1TMS = 1UPDATE_DRTMS = 1UPDATE_IRTMS = 0TMS = 0While the Jam Player provides a driver that manipulates the TAPcontroller, the Jam Byte-Code File (.jbc) provides the high-levelintelligence needed to program a given device. All Jam instructions thatAltera Corporation 11–45July 2005 Stratix Device Handbook, Volume 2
Configuration Schemessend JTAG data to the device involve moving the TAP controller througheither the data register leg or the instruction register leg of the statemachine. For example, loading a JTAG instruction involves moving theTAP controller to the SHIFT_IR state and shifting the instruction into theinstruction register through the TDI pin. Next, the TAP controller ismoved to the RUN_TEST/IDLE state where a delay is implemented toallow the instruction time to be latched. This process is identical for dataregister scans, except that the data register leg of the state machine istraversed.The high-level Jam instructions are the DRSCAN instruction for scanningthe JTAG data register, the IRSCAN instruction for scanning theinstruction register, and the WAIT command that causes the state machineto sit idle for a specified period of time. Each leg of the TAP controller isscanned repeatedly, according to instructions in the JBC file, until all ofthe target devices are programmed.Figure 11–25 illustrates the functional behavior of the Jam Player when itparses the JBC file. When the Jam Player encounters a DRSCAN, IRSCAN,or WAIT instruction, it generates the proper data on TCK, TMS, and TDI tocomplete the instruction. The flow diagram shows branches for theDRSCAN, IRSCAN, and WAIT instructions. Although the Jam Playersupports other instructions, they are omitted from the flow diagram forsimplicity.11–46 Altera CorporationStratix Device Handbook, Volume 2 July 2005
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Configuration HandbookPreliminary I
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ContentsVolume I...................
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Altera FPGAsPreliminary Information
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IntroductionAll configuration schem
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Device Configuration Overview for P
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Selecting a Configuration SchemeSel
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Selecting a Configuration SchemePas
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IntroductionfFor information on enh
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Configuration FeaturesUse the data
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Configuration FeaturesStratix III d
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Configuration Features5. Select Add
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Configuration FeaturesV CCPGM PinsS
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Fast Passive Parallel Configuration
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Fast Active Serial Configuration (S
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Passive Serial ConfigurationPS Conf
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Passive Serial ConfigurationAn opti
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Passive Serial ConfigurationDCLK, D
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Passive Serial ConfigurationFigure
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Passive Serial Configuration1 To be
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Passive Serial Configuration1 If yo
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Passive Serial ConfigurationThe enh
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Passive Serial ConfigurationThe Qua
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Passive Serial Configuration1 You c
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Passive Serial Configurationoption
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Passive Serial ConfigurationIf you
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JTAG ConfigurationJTAGConfiguration
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JTAG ConfigurationFigure 11-29. JTA
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JTAG ConfigurationTable 11-13. Dedi
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JTAG ConfigurationAfter the first d
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Device Configuration PinsTable 11-1
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ConclusionConclusionDocumentRevisio
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Introduction1 For more information
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Configuration FeaturesTable 7-3. St
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Configuration Features1 When using
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Configuration Features6. Select the
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Configuration FeaturesV CCPD PinsSt
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Configuration Featuresthan 00X0 (MS
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Active Serial Configuration (Serial
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Passive Serial ConfigurationTable 7
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Passive Serial ConfigurationfThe va
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Passive Serial Configurationpulled
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Passive Serial ConfigurationIf the
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Passive Serial Configurationsoftwar
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Passive Serial Configurationconfigu
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Passive Serial ConfigurationUpon po
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Passive Serial ConfigurationIn addi
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Passive Parallel Asynchronous Confi
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JTAG ConfigurationJTAGConfiguration
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JTAG ConfigurationFigure 7-35. JTAG
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JTAG ConfigurationTable 7-20. Dedic
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JTAG ConfigurationAfter the first d
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Device Configuration PinsDeviceConf
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Page 197 and 198: Device Configuration PinsTable 7-22
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Page 209 and 210: Configuration File SizeTDO & nCEO P
Page 211 and 212: Configuration SchemesPS Configurati
Page 213 and 214: Configuration SchemesFigure 11-2. S
Page 215 and 216: Configuration SchemesRestart Config
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Page 221 and 222: Configuration SchemesPS Configurati
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Page 267 and 268: Configuration Data CompressionAltho
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Page 285 and 286: PS ConfigurationPS ConfigurationYou
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PS ConfigurationnCONFIG is low and
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PS ConfigurationFigure 13-14. Multi
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PS ConfigurationnCONFIG low for at
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PS ConfigurationDATA3, you can leav
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PS ConfigurationPS Configuration Us
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PS ConfigurationIn addition, becaus
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PS Configurationthe five common sig
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JTAG ConfigurationA device operatin
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JTAG Configurationenables the progr
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JTAG ConfigurationFigure 13-23. JTA
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JTAG Configuration1 The Quartus II
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JTAG Configurationfeature. To use t
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Device Configuration PinsReconfigur
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ConclusionTable 13-13 describes the
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Document Revision HistoryDocumentRe
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Device Configuration OverviewYou ca
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Data CompressionWhen you enable com
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Data CompressionCompression can als
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Configuration SchemesConfigurationS
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Configuration Schemesinternal oscil
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Configuration SchemesFigure 13-6. C
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Configuration SchemesFigure 13-7. C
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Configuration SchemesASDI and nCS s
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Configuration SchemesYou can progra
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Configuration SchemesWhen configuri
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Configuration SchemesFigure 13-12.
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Configuration SchemesPS Configurati
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Configuration SchemesFigure 13-18 s
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Configuration Schemesattempt JTAG c
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Configuration Schemes1 If V CCIO is
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Configuration Schemes1 Both JTAG co
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Configuration Schemessend JTAG data
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Configuration SchemesTable 13-9. Re
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Document Revision History13-52 Alte
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Passive Serial Configurationinterna
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Passive Serial ConfigurationHandsha
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Passive Serial ConfigurationIf the
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Passive Serial Configurationoption,
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JTAG ConfigurationTable 6-6. PPA Ti
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JTAG ConfigurationDuring JTAG confi
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JTAG ConfigurationFigure 6-30. JTAG
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Device Configuration PinsfFor more
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Device Configuration PinsTable 6-9.
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Device Configuration PinsJTAG pins
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IntroductionTable 7-2 shows the app
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Passive Serial Configuration1 V CCI
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Passive Serial ConfigurationWhen CO
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Passive Serial ConfigurationfFor mo
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Passive Serial Configurationpulled
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Passive Parallel Synchronous Config
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JTAG ConfigurationTable 7-6. PPA Ti
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JTAG Configurationprogramming devic
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JTAG ConfigurationJTAG-chain device
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JTAG ConfigurationThe Jam Player pr
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APEX 20KE Power SequencingThese gui
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APEX 20KE Power SequencingUse these
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APEX 20KE Power Sequencing7-70 Alte
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Introductionsuccessfully. Toggling
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Passive Serial ConfigurationThe fol
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Device Configuration Pins8-70 Alter
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FPGA Configuration DevicesPrelimina
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Choosing a Configuration DevicefFor
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1-4 Altera CorporationConfiguration
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Functional Description■■■■
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Functional DescriptionFigure 2-1. E
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Functional DescriptionIn addition t
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Functional DescriptionFast Passive
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Functional DescriptionThe configura
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Functional DescriptionTable 2-3 sum
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Generating Configuration FilesYou c
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SRAM Object File (.sof)6. Click on
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8. Configuring Mixed AlteraFPGA Cha
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Configuring Mixed Altera FPGA Chain
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9. Combining DifferentConfiguration
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Combining Different Configuration S
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Debugging Suggestions■■To check
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