Configuration Handbook - Kamami.pl

Fast Passive Parallel ConfigurationFigure 6–21 shows how to configure multiple devices using amicroprocessor. This circuit is similar to the FPP configuration circuit fora single device, except the APEX II devices are cascaded for multi-deviceconfiguration.Figure 6–21. Multi-Device FPP Configuration Using a MicroprocessorMemoryADDRDATA[7..0]V CC (1)V CC (1)1 kΩ 1 kΩAPEX II Device 1V CCAPEX II Device 2V CCMicroprocessorGNDCONF_DONEnSTATUSnCEDATA[7..0]MSEL1MSEL0nCEOGNDCONF_DONEnSTATUSnCEDATA[7..0]MSEL1MSEL0nCEOGNDN.C.nCONFIGDCLKnCONFIGDCLKNote to Figure 6–21:(1) The pull-up resistor should be connected to a supply that provides an acceptable input signal for all devices in thechain.In multi-device FPP configuration the first device’s nCE pin is connectedto GND while its nCEO pin is connected to nCE of the next device in thechain. The last device’s nCE input comes from the previous device, whileits nCEO pin is left floating. After the first device completes configurationin a multi-device configuration chain, its nCEO pin drives low to activatethe second device’s nCE pin, which prompts the second device to beginconfiguration. The second device in the chain begins configuration withinone clock cycle; therefore, the transfer of data destinations is transparentto the microprocessor. All other configuration pins (nCONFIG, nSTATUS,DCLK, DATA[7..0], and CONF_DONE) are connected to every device inthe chain. You should pay special attention to the configuration signalsbecause they may require buffering to ensure signal integrity and preventclock skew problems. Specifically, ensure that the DCLK and DATA linesare buffered for every fourth device. Because all device CONF_DONE pinsare tied together, all devices initialize and enter user mode at the sametime.6–42 Altera CorporationConfiguration Handbook, Volume 1 August 2005