Configuration Handbook - Kamami.pl

Configuring Stratix II & Stratix II GX Devices1 To begin configuration, power the V CCINT , V CCIO , and V CCPDvoltages (for the banks where the configuration and JTAG pinsreside) to the appropriate voltage levels.The serial clock (DCLK) generated by the Stratix II and Stratix II GXdevices controls the entire configuration cycle and provides the timing forthe serial interface. Stratix II and Stratix II GX devices use an internaloscillator to generate DCLK. Using the MSEL[] pins, you can select to useeither a 40- or 20-MHz oscillator.1 Only the EPCS16 and EPCS64 devices support a DCLK up to40-MHz clock; other EPCS devices support a DCLK up to20-MHz. Refer to the Serial Configuration Devices Data Sheet formore information. The EPCS4 device only supports the smallestStratix II (EP2S15) device, which is when the SOF compressionis enabled. Because of its insufficient memory capacity, theEPCS1 device does not support any Stratix II devices.Table 7–12 shows the active serial DCLK output frequencies.Table 7–12. Active Serial DCLK Output Frequency Note (1)Oscillator Minimum Typical Maximum Units40 MHz (2) 20 26 40 MHz20 MHz 10 13 20 MHzNotes to Table 7–12:(1) These values are preliminary.(2) Only the EPCS16 and EPCS64 devices support a DCLK up to 40-MHz clock; otherEPCS devices support a DCLK up to 20-MHz. Refer to the Serial ConfigurationDevices Data Sheet for more information.In both AS and fast AS configuration schemes, the serial configurationdevice latches input and control signals on the rising edge of DCLK anddrives out configuration data on the falling edge. Stratix II andStratix II GX devices drive out control signals on the falling edge of DCLKand latch configuration data on the falling edge of DCLK.In configuration mode, Stratix II and Stratix II GX devices enable theserial configuration device by driving the nCSO output pin low, whichconnects to the chip select (nCS) pin of the configuration device. TheStratix II and Stratix II GX devices use the serial clock (DCLK) and serialdata output (ASDO) pins to send operation commands and/or readaddress signals to the serial configuration device. The configurationdevice provides data on its serial data output (DATA) pin, which connectsto the DATA0 input of the Stratix II and Stratix II GX devices.Altera Corporation 7–37May 2007 Stratix II Device Handbook, Volume 2