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Configuration Handbook - Kamami.pl

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Configuring Cyclone II DevicesSingle Device JTAG <strong>Configuration</strong>During JTAG configuration, you can use the USB-Blaster, MasterBlaster,ByteBlaster II, or ByteBlasterMV download cable to download data to thedevice. Configuring Cyclone II devices through a cable is similar toprogramming devices in system. Figure 13–22 shows JTAG configurationof a single Cyclone II device using a download cable.Figure 13–22. JTAG <strong>Configuration</strong> of a Single Device Using a Download CableV CCGND(1)10 kΩ(1)10 kΩCyclone II DevicenCE (4)TCKTDO1 kΩV CC (1)V CC (1)1 kΩV CC(2)(2)(2)(2)(2)N.C. (5)nCEOnSTATUSCONF_DONEnCONFIGMSEL0MSEL1DATA0DCLKTMSTDIUSB-Blaster, ByteBlaster II,MasterBlaster, or ByteBlasterMV10-Pin Male Header(Top View)Pin 1V CC (1)GNDVIO (3)1 kΩGNDNotes to Figure 13–22:(1) The pull-up resistor should be connected to the same sup<strong>pl</strong>y voltage as the USB-Blaster, MasterBlaster (VIO pin),ByteBlaster II, or ByteBlasterMV cable.(2) Connect the nCONFIG and MSEL[1..0] pins to support a non-JTAG configuration scheme. If only JTAGconfiguration is used, connect the nCONFIG pin to V CC , and the MSEL[1..0] pins to ground. In addition, pull DCLKand DATA0 to either high or low, whichever is convenient on your board.(3) Pin 6 of the header is a V IO reference voltage for the MasterBlaster output driver. V IO should match the device’sV CCIO . Refer to the MasterBlaster Serial/USB Communications Cable Data Sheet for this value. In the ByteBlasterMV,this pin is a no connect. In the USB-Blaster and ByteBlaster II, this pin is connected to nCE when it is used for ASprogramming, otherwise it is a no connect.(4) nCE must be connected to GND or driven low for successful JTAG configuration.(5) The nCEO pin can be left unconnected or used as a user I/O pin when it does not feed other device’s nCE pin.GNDTo configure a single device in a JTAG chain, the programming software<strong>pl</strong>aces all other devices in BYPASS mode. In BYPASS mode, Cyclone IIdevices pass programming data from the TDI pin to the TDO pin througha single bypass register without being affected internally. This schemeAltera Corporation 13–55February 2007 Cyclone II Device <strong>Handbook</strong>, Volume 1

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