Configuration Handbook - Kamami.pl

Configuring Stratix II & Stratix II GX DevicesTable 7–22. Dedicated Configuration Pins on the Stratix II & Stratix II GX Device (Part 8 of 10)Pin NameUser ModeConfigurationSchemeDATA[7..1] I/O Parallelconfigurationschemes(FPP andPPA)Pin TypeInputsDescriptionData inputs. Byte-wide configuration data ispresented to the target device onDATA[7..0].The V IH and V IL levels for this pin aredependent on the input buffer selected by theVCCSEL pin. Refer to the section “VCCSELPin” on page 7–10 for more information.In serial configuration schemes, they functionas user I/O pins during configuration, whichmeans they are tri-stated.After PPA or FPP configuration,DATA[7..1] are available as user I/O pinsand the state of these pin depends on theDual-Purpose Pin settings.DATA7 I/O PPA Bidirectional In the PPA configuration scheme, the DATA7pin presents the RDYnBSY signal after thenRS signal has been strobed low.The V IH and V IL levels for this pin aredependent on the input buffer selected by theVCCSEL pin. Refer to the section “VCCSELPin” on page 7–10 for more information.In serial configuration schemes, it functions asa user I/O pin during configuration, whichmeans it is tri-stated.After PPA configuration, DATA7 is available asa user I/O and the state of this pin depends onthe Dual-Purpose Pin settings.nWS I/O PPA Input Write strobe input. A low-to-high transitioncauses the device to latch a byte of data on theDATA[7..0] pins.In non-PPA schemes, it functions as a user I/Opin during configuration, which means it istri-stated.After PPA configuration, nWS is available as auser I/O pins and the state of this pin dependson the Dual-Purpose Pin settings.Altera Corporation 7–101May 2007 Stratix II Device Handbook, Volume 2