Configuration Handbook - Kamami.pl

Configuring APEX 20KE & APEX 20KC DevicesTable 7–4 defines the timing parameters for APEX 20KE and APEX 20KCdevices for PS configuration.Table 7–4. PS Timing Parameters for APEX 20KE & APEX 20KC DevicesSymbol Parameter Min Max Unitst CF2CD nCONFIG low to CONF_DONE low 200 nst CF2ST0 nCONFIG low to nSTATUS low 200 nst CFG nCONFIG low pulse width 8 µst STATUS nSTATUS low pulse width 10 40 (1) µst CF2ST1 nCONFIG high to nSTATUS high 1 (1) µst CF2CK nCONFIG high to first rising edge on DCLK 40 µst ST2CK nSTATUS high to first rising edge on DCLK 1 µst DSU Data setup time before rising edge on DCLK 10 nst DH Data hold time after rising edge on DCLK 0 nst CH DCLK high time 7.5 nst CL DCLK low time 7.5 nst CLK DCLK period 15 nsf MAX DCLK maximum frequency 66 MHzt CD2UM CONF_DONE high to user mode (2) 2 8 µsNotes to Table 7–4:(1) This value is applicable if users do not delay configuration by extending the nSTATUS low pulse width.(2) The minimum and maximum numbers apply only if the internal oscillator is chosen as the clock source for startingthe device. If the clock source is CLKUSR, multiply the clock period by 40 for APEX 20KE and APEX 20KC devicesto obtain this value.fDevice configuration options and how to create configuration files arediscussed further in Software Settings, chapter 6 and 7 in volume 2 of theConfiguration Handbook.Configuring Using the MicroBlaster DriverThe MicroBlaster TM software driver allows you to configure Altera’sFPGAs through the ByteBlasterMV cable in PS mode. The MicroBlastersoftware driver supports a RBF programming input file and is targetedfor embedded passive serial configuration. The source code is developedfor the Windows NT operating system, although you can customize it torun on other operating systems. For more information on theMicroBlaster software driver, go to the Altera web site(http://www.altera.com).Altera Corporation 7–27August 2005 Configuration Handbook, Volume 1