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Configuration Handbook - Kamami.pl

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Configuring Stratix & Stratix GX DevicesTable 11–15. Dedicated <strong>Configuration</strong> Pins on the Stratix or Stratix GX Device (Part 3 of 8)Pin NameUser Mode<strong>Configuration</strong>SchemePin TypenSTATUS N/A All Bidirectionalopen-drainDescriptionThe device drives nSTATUS low immediatelyafter power-up and releases it after the PORtime.Status output. If an error occurs duringconfiguration, nSTATUS is pulled low by thetarget device. Status input. If an externalsource drives the nSTATUS pin low duringconfiguration or initialization, the target deviceenters an error state.Driving nSTATUS low after configuration andinitialization does not affect the configureddevice. If a configuration device is used, drivingnSTATUS low causes the configuration deviceto attempt to configure the FPGA, but since theFPGA ignores transitions on nSTATUS in usermode,the FPGA does not reconfigure. Toinitiate a reconfiguration, nCONFIG must bepulled low.The enhanced configuration devices’ andEPC2 devices’ OE and nCS pins have optionalinternal programmable pull-up resistors. Ifinternal pull-up resistors on the enhancedconfiguration device are used, external 10-kΩpull-up resistors should not be used on thesepins. When using EPC2 devices, only external10-kΩ pull-up resistors should be used.This pin uses Schmitt trigger input buffers.Altera Corporation 11–53July 2005 Stratix Device <strong>Handbook</strong>, Volume 2

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