Configuration Handbook - Kamami.pl

Configuring Stratix & Stratix GX DevicesFigure 11–12. Parallel Configuration Using a MicroprocessorV CC (1)MemoryADDR DATA[7..0]MicroprocessorV CC (1)10 kΩ 10 kΩStratix DeviceMSEL2MSEL1CONF_DONEMSEL0nSTATUSnCEGNDnCEODATA[7..0]nCONFIGDCLKGNDN.C.Note to Figure 11–12:(1) The pull-up resistors should be connected to any V CC that meets the Stratix highlevelinput voltage (V IH ) specification.For multi-device parallel configuration with a microprocessor, the nCEOpin of the first Stratix or Stratix GX device is cascaded to the seconddevice’s nCE pin. The second device in the chain begins configurationwithin one clock cycle; therefore, the transfer of data destinations istransparent to the microprocessor. Because the CONF_DONE pins of thedevices are connected together, all devices initialize and enter user modeat the same time.Because the nSTATUS pins are also tied together, if any of the devicesdetects an error, the entire chain halts configuration and drives nSTATUSlow. The microprocessor can then pulse nCONFIG low to restartconfiguration. If the Auto-restart configuration after error option is on,the Stratix and Stratix GX devices release nSTATUS after a reset time-outperiod. The microprocessor can then reconfigure the devices oncenSTATUS is released. Figure 11–13 shows multi-device configurationusing a microprocessor. Figure 11–14 shows multi-device configurationwhen both Stratix and Stratix GX devices are receiving the same data. Inthis case, the microprocessor sends the data to both devicessimultaneously, and the devices configure simultaneously.Altera Corporation 11–27July 2005 Stratix Device Handbook, Volume 2