12.07.2015 Views

Configuration Handbook - Kamami.pl

Configuration Handbook - Kamami.pl

Configuration Handbook - Kamami.pl

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

IntroductionTable 6–1. <strong>Configuration</strong> Options (Part 2 of 5)Device OptionEnable usersup<strong>pl</strong>iedstart-upclock (CLKUSR)(Stratix series,Cyclone ® series,APEX TM II,APEX 20K, andMercury TM devicesonly).Option UsageThis option allows you toselect which clock source isused for initialization, eitherthe internal oscillator orexternal clocks provided onthe CLKUSR pin.Default <strong>Configuration</strong>(Option Off)The device’s internaloscillator (typically 10 MHz)sup<strong>pl</strong>ies the initializationclock and the FPGA will takecare to provide itself withenough clock cycles forproper initialization.The CLKUSR pin is availableas a user I/O pin.Modified <strong>Configuration</strong>(Option On)The initialization clock mustbe provided on the CLKUSRpin. This clock cansynchronize the initializationof multi<strong>pl</strong>e devices. The clockshould be sup<strong>pl</strong>ied when thelast data byte is transferred.Sup<strong>pl</strong>ying a clock on CLKUSRwill not affect theconfiguration process.Enable usersup<strong>pl</strong>iedstart-upclock (CLKUSR)(ACEX 1K, FLEX10K, and FLEX6000 devicesonly.)This option allows you toselect which clock source isused for initialization, eitherexternal clocks provided onthe CLKUSR pin or on theDCLK pin.In PS and PPS schemes, theinternal oscillator is disabled.Thus, external circuitry, suchas a configuration device ormicroprocessor, mustprovide the initialization clockon the DCLK pin.Programming files generatedby the Quartus II orMAX+PLUS II softwarealready have theseinitialization clock cyclesincluded in the file.In the PPA and PSAconfiguration schemes, thedevice’s internal oscillator(typically 10 MHz) sup<strong>pl</strong>iesthe initialization clock and theFPGA will take care toprovide itself with enoughclock cycles for properinitialization.The CLKUSR pin is availableas a user I/O pin.For more information on howmany clock cycles areneeded to properly initialize adevice, see the appropriatedevice family chapters.The initialization clock mustbe provided on the CLKUSRpin. This clock cansynchronize the initializationof multi<strong>pl</strong>e devices. The clockshould be sup<strong>pl</strong>ied when thelast data byte is transferred.Sup<strong>pl</strong>ying a clock on CLKUSRwill not affect theconfiguration process.For more information on howmany clock cycles areneeded to properly initialize adevice, see the appropriatedevice family chapters.6–6 Altera Corporation<strong>Configuration</strong> <strong>Handbook</strong>, Volume 2 April 2007

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!