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Configuration Handbook - Kamami.pl

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Combining Different <strong>Configuration</strong> Schemes1 If there is a configuration device on board, upon power-up youshould allow the FPGA to finish configuration beforeattempting JTAG configuration.Figure 9–2. JTAG Programming of <strong>Configuration</strong> Device and FPGA with PS <strong>Configuration</strong> of FPGA Using a<strong>Configuration</strong> DeviceVCC (1)VCC (1)1 kΩ1 kΩDownload Cable VCC (1)(JTAG Mode)10-Pin Male Header (2) VCC (1)(2)VCC (1)(2)VCCVIOFPGAGND1 kΩGND<strong>Configuration</strong> DevicenMSELDCLKCONF_DONEnCONFIGnSTATUSDATA0nCEOnCEN.C.DATADCLKOEnCSTMSTCKTDInINIT_CONFTDOTDITRSTTMSTCKTDOGNDVCCNotes to Figure 9–2:(1) V CC should be connected to the same sup<strong>pl</strong>y voltage as the configuration device. For APEX 20KE devices, nCONFIGshould be pulled up to V CCINT .(2) If the internal pull-up resistors of the configuration device are used, external pull-up resistors should not be usedon these pins.The download cables can be used in different modes (e.g., JTAG mode orPS mode) and in each mode, the header of the download cable connectsto different pins on the FPGA. Therefore, two separate 10-pin headers arerequired on your board in order to support two different modes of thedownload cable. Figure 9–3 shows a schematic with two downloadcables. One download cable is used in JTAG mode to JTAG program theAltera Corporation 9–3April 2007 <strong>Configuration</strong> <strong>Handbook</strong>, Volume 2

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