Configuration Handbook - Kamami.pl

Configuring Stratix II & Stratix II GX Devices1 You can hold nConfig low in order to stop deviceconfiguration.fThe value of the weak pull-up resistors on the I/O pins that are on beforeand during configuration can be found in the DC & SwitchingCharacteristics chapter in volume 1 of the Stratix II Device Handbook andthe Stratix II GX Device Handbook.The configuration cycle consists of three stages: reset, configuration andinitialization. While nCONFIG or nSTATUS are low, the device is in reset.To initiate configuration, the microprocessor must generate a low-to-hightransition on the nCONFIG pin.1 To begin configuration, power the V CCINT , V CCIO , and V CCPDvoltages (for the banks where the configuration and JTAG pinsreside) to the appropriate voltage levels.When nCONFIG goes high, the device comes out of reset and releases theopen-drain nSTATUS pin, which is then pulled high by an external 10-kΩpull-up resistor. Once nSTATUS is released the device is ready to receiveconfiguration data and the configuration stage begins. When nSTATUS ispulled high, the microprocessor should then assert the target device’snCS pin low and/or CS pin high. Next, the microprocessor places an 8-bitconfiguration word (one byte) on the target device’s DATA[7..0] pinsand pulses the nWS pin low.On the rising edge of nWS, the target device latches in a byte ofconfiguration data and drives its RDYnBSY signal low, which indicates itis processing the byte of configuration data. The microprocessor can thenperform other system functions while the Stratix II or Stratix II GX deviceis processing the byte of configuration data.During the time RDYnBSY is low, the Stratix II or Stratix II GX deviceinternally processes the configuration data using its internal oscillator(typically 100 MHz). When the device is ready for the next byte ofconfiguration data, it will drive RDYnBSY high. If the microprocessorsenses a high signal when it polls RDYnBSY, the microprocessor sends thenext byte of configuration data to the device.Alternatively, the nRS signal can be strobed low, causing the RDYnBSYsignal to appear on DATA7. Because RDYnBSY does not need to bemonitored, this pin doesn’t need to be connected to the microprocessor.Do not drive data onto the data bus while nRS is low because it will causecontention on the DATA7 pin. If you are not using the nRS pin to monitorconfiguration, it should be tied high.Altera Corporation 7–75May 2007 Stratix II Device Handbook, Volume 2