Configuration Handbook - Kamami.pl

Configuring Mercury, APEX 20K (2.5 V), ACEX 1K & FLEX 10K DevicesTable 8–20. Dedicated Configuration Pins (Part 2 of 4)Pin NameUserModeConfigurationSchemePin TypenSTATUS N/A All Bidirectionalopen-drainCONF_DONE N/A All Bidirectionalopen-drainDescriptionThe FPGA drives nSTATUS low immediately after powerupand releases it within 5 µs. (When using aconfiguration device, the configuration device holdsnSTATUS low for up to 200 ms.)Status output. If an error occurs during configuration,nSTATUS is pulled low by the target device.Status input. If an external source drives the nSTATUSpin low during configuration or initialization, the targetdevice enters an error state.Driving nSTATUS low after configuration and initializationdoes not affect the configured device. If a configurationdevice is used, driving nSTATUS low will cause theconfiguration device to attempt to configure the FPGA,but since the FPGA ignores transitions on nSTATUS inuser-mode, the FPGA will not reconfigure. To initiate areconfiguration, nCONFIG must be pulled low.The enhanced configuration devices’ and EPC2 devices’OE and nCS pins have optional internal programmablepull-up resistors. If internal pull-up resistors are used,external 1-kΩ pull-up resistors should not be used onthese pins.Status output. The target FPGA drives the CONF_DONEpin low before and during configuration. Once allconfiguration data is received without error and theinitialization cycle starts, the target device releasesCONF_DONE.Status input. After all data is received and CONF_DONEgoes high, the target device initializes and enters usermode.Driving CONF_DONE low after configuration andinitialization does not affect the configured device.The enhanced configuration devices’ and EPC2 devices’OE and nCS pins have optional internal programmablepull-up resistors. If internal pull-up resistors are used,external 1-kΩ pull-up resistors should not be used onthese pins.nCE N/A All Input Active-low chip enable. The nCE pin activates the devicewith a low signal to allow configuration. The nCE pin mustbe held low during configuration, initialization, and usermode. In single device configuration, it should be tiedlow. In multi-device configuration, nCE of the first deviceis tied low while its nCEO pin is connected to nCE of thenext device in the chain.The nCE pin must also be held low for successful JTAGprogramming of the FPGA.Altera Corporation 8–65August 2005 Configuration Handbook, Volume 1