Configuration Handbook - Kamami.pl

Configuration SchemesfFor more information on the JRunner software driver, see the JRunnerSoftware Driver: An Embedded Solution to the JTAG Configuration WhitePaper and zip file.Jam STAPL Programming & Test LanguageThe Jam TM Standard Test and Programming Language (STAPL), JEDECstandard JESD-71, is a standard file format for in-systemprogrammability (ISP) purposes. Jam STAPL supports programming orconfiguration of programmable devices and testing of electronic systems,using the IEEE 1149.1 JTAG interface. Jam STAPL is a freely licensed openstandard.Connecting the JTAG Chain to the Embedded ProcessorThere are two ways to connect the JTAG chain to the embedded processor.The most straightforward method is to connect the embedded processordirectly to the JTAG chain. In this method, four of the processor pins arededicated to the JTAG interface, saving board space but reducing thenumber of available embedded processor pins.Figure 11–23 illustrates the second method, which is to connect the JTAGchain to an existing bus through an interface PLD. In this method, theJTAG chain becomes an address on the existing bus. The processor thenreads from or writes to the address representing the JTAG chain.11–42 Altera CorporationStratix Device Handbook, Volume 2 July 2005