Configuration Handbook - Kamami.pl

Fast Passive Parallel Configurationconfiguration device also goes through a POR delay to allow the powersupply to stabilize. The POR time for enhanced configuration devices canbe set to either 100 ms or 2 ms, depending on its PORSEL pin setting. If thePORSEL pin is connected to GND, the POR delay is 100 ms. If the PORSELpin is connected to V CC , the POR delay is 2 ms. During this time, theconfiguration device drives its OE pin low. This low signal delaysconfiguration because the OE pin is connected to the target device’snSTATUS pin.1 When selecting a POR time, you need to ensure that the devicecompletes power-up before the enhanced configuration deviceexits POR. Altera recommends that you use a 12-ms POR timefor the Stratix II or Stratix II GX device, and use a 100-ms PORtime for the enhanced configuration device.When both devices complete POR, they release their open-drain OE ornSTATUS pin, which is then pulled high by a pull-up resistor. Once thedevice successfully exits POR, all user I/O pins continue to be tri-stated.If nIO_pullup is driven low during power-up and configuration, theuser I/O pins and dual-purpose I/O pins will have weak pull-upresistors, which are on (after POR) before and during configuration. IfnIO_pullup is driven high, the weak pull-up resistors are disabled.fThe value of the weak pull-up resistors on the I/O pins that are on beforeand during configuration can be found in the Stratix II Device Handbookor the Stratix II GX Device Handbook.When the power supplies have reached the appropriate operatingvoltages, the target device senses the low-to-high transition on nCONFIGand initiates the configuration cycle. The configuration cycle consists ofthree stages: reset, configuration and initialization. While nCONFIG ornSTATUS are low, the device is in reset. The beginning of configurationcan be delayed by holding the nCONFIG or nSTATUS pin low.1 V CCINT , V CCIO and V CCPD of the banks where the configurationand JTAG pins reside need to be fully powered to theappropriate voltage levels in order to begin the configurationprocess.When nCONFIG goes high, the device comes out of reset and releases thenSTATUS pin, which is pulled high by a pull-up resistor. Enhancedconfiguration devices have an optional internal pull-up resistor on the OEpin. This option is available in the Quartus II software from the Generaltab of the Device & Pin Options dialog box. If this internal pull-upresistor is not used, an external 10-kΩ pull-up resistor on theOE-nSTATUS line is required. Once nSTATUS is released, the device isready to receive configuration data and the configuration stage begins.7–28 Altera CorporationStratix II Device Handbook, Volume 2 May 2007