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Configuration Handbook - Kamami.pl

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Pin DescriptionTable 2–6. <strong>Configuration</strong> Interface PinsPin Name Pin Type DescriptionnINIT_CONF Open-Drain Output The nINIT_CONF pin can be connected to the nCONFIG pin on theFPGA to initiate configuration from the enhanced configuration device viaa private JTAG instruction. This pin contains an internal weak pull-upresistor that is always active. The INIT_CONF pin does not need to beconnected if its functionality is not used. If nINIT_CONF is not used,nCONFIG must be pulled to V CC either directly or through a pull-upresistor.OEOpen-DrainBidirectionalThis pin is driven low when POR is not com<strong>pl</strong>ete. A user-selectable 2-msor 100-ms counter holds off the release of OE during initial power up topermit voltage levels to stabilize. POR time can be extended by externallyholding OE low. OE is connected to the FPGA nSTATUS signal. After theenhanced configuration device controller releases OE, it waits for thenSTATUS-OE line to go high before starting the FPGA configurationprocess. This pin contains a programmable internal weak pull-up resistorthat can be disabled/enabled in the Quartus II software through theDisable nCS and OE pull-ups on configuration device option.2–22 Altera Corporation<strong>Configuration</strong> <strong>Handbook</strong>, Volume 2 May 2007

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