Configuration Handbook - Kamami.pl

Device Configuration PinsTable 11–15. Dedicated Configuration Pins on the Stratix III Device (Part 6 of 7)ASDOnCSOPin Name User Mode ConfigurationSchemeN/A in ASmode, I/O innon-ASmodeN/A in ASmode, I/O innon-ASmodeDCLK N/A Synchronousconfigurationschemes (PS,FPP, AS)Pin TypeAS Output Control signal from the Stratix III device to theserial configuration device in AS mode used toread out configuration data.In AS mode, ASDO has an internal pull-upresistor that is always active.AS Output Output control signal from the Stratix III deviceto the serial configuration device in AS modethat enables the configuration device.Input (PS,FPP) Output(AS)DescriptionIn AS mode, nCSO has an internal pull-upresistor that is always active.In PS and FPP configuration, DCLK is theclock input used to clock data from an externalsource into the target device. Data is latchedinto the device on the rising edge of DCLK.In AS mode, DCLK is an output from theStratix III device that provides timing for theconfiguration interface. In AS mode, DCLK hasan internal pull-up resistor (typically 25 kΩ)that is always active.After configuration, this pin is tri-stated. Inschemes that use a configuration device,DCLK will be driven low after configuration isdone. In schemes that use a control host,DCLK should be driven either high or low,whichever is more convenient. Toggling thispin after configuration does not affect theconfigured device.11–80 Altera CorporationStratix III Device Handbook, Volume 1 May 2007