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Configuration Handbook - Kamami.pl

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Passive Parallel Asynchronous <strong>Configuration</strong>been successfully configured, it will driven nCEO low to activate the nextdevice in the chain and drive its RDYnBSY pin high. Therefore, sinceRDYnBSY signal is driven high before configuration and afterconfiguration before entering user-mode, the device being configuredwill govern the output of the AND gate.The nRS signal can be used in multi-device PPA chain since the APEX IIdevice will tri-state its DATA[7..0] pins before configuration and afterconfiguration before entering user-mode to avoid contention. Therefore,only the device that is currently being configured will respond to the nRSstrobe by asserting DATA7.All other configuration pins (nCONFIG, nSTATUS, DATA[7..0], nCS,CS, nWS, nRS and CONF_DONE) are connected to every device in the chain.You should pay special attention to the configuration signals becausethey may require buffering to ensure signal integrity and prevent clockskew problems. Specifically, ensure that the DATA lines are buffered forevery fourth device. Because all device CONF_DONE pins are tied together,all devices initialize and enter user mode at the same time.Since all nSTATUS and CONF_DONE pins are tied together, if any devicedetects an error, configuration stops for the entire chain and the entirechain must be reconfigured. For exam<strong>pl</strong>e, if the first FPGA flags an erroron nSTATUS, it resets the chain by pulling its nSTATUS pin low. Thisbehavior is similar to a single FPGA detecting an error.If the Auto-Restart <strong>Configuration</strong> After Error option is turned on, the FPGAsrelease their nSTATUS pins after a reset time-out period (maximum of 40µs). After all nSTATUS pins are released and pulled high, themicroprocessor can try to reconfigure the chain without needing to pulsenCONFIG low. If this option is turned off, the microprocessor mustgenerate a low-to-high transition (with a low pulse of at least 8 µs) onnCONFIG to restart the configuration process.In your system, you may have multi<strong>pl</strong>e devices that contain the sameconfiguration data. To support this configuration scheme, all device nCEinputs are tied to GND, while nCEO pins are left floating. All otherconfiguration pins (nCONFIG, nSTATUS, DATA[7..1], nCS, CS, nWS,nRS and CONF_DONE) are connected to every device in the chain. Youshould pay special attention to the configuration signals because theymay require buffering to ensure signal integrity and prevent clock skewproblems. Specifically, ensure that the DATA lines are buffered for everyfourth device. Devices must be the same density and package. All deviceswill start and com<strong>pl</strong>ete configuration at the same time. Figure 6–26 showsmulti-device PPA configuration when both devices are receiving the sameconfiguration data.6–52 Altera Corporation<strong>Configuration</strong> <strong>Handbook</strong>, Volume 1 August 2005

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