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Configuration Handbook - Kamami.pl

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Configuring Mercury, APEX 20K (2.5 V), ACEX 1K & FLEX 10K DevicesIn multi-device PS configuration, the first device’s nCE pin is connectedto GND while its nCEO pin is connected to nCE of the next device in thechain. The last device’s nCE input comes from the previous device, whileits nCEO pin is left floating. After the first device com<strong>pl</strong>etes configurationin a multi-device configuration chain, its nCEO pin drives low to activatethe second device’s nCE pin, which prompts the second device to beginconfiguration. All other configuration pins (nCONFIG, nSTATUS, DCLK,DATA0, and CONF_DONE) are connected to every device in the chain. Youshould pay special attention to the configuration signals because they canrequire buffering to ensure signal integrity and prevent clock skewproblems. Specifically, ensure that the DCLK and DATA lines are bufferedfor every fourth device.When configuring multi<strong>pl</strong>e devices, configuration does not begin until alldevices release their OE or nSTATUS pins. Similarly, since all deviceCONF_DONE pins are tied together, all devices initialize and enter usermode at the same time.Since all nSTATUS and CONF_DONE pins are tied together, if any devicedetects an error, configuration stops for the entire chain and the entirechain must be reconfigured. For exam<strong>pl</strong>e, if the first FPGA flags an erroron nSTATUS, it resets the chain by pulling its nSTATUS pin low. This lowsignal drives the OE pin low on the configuration device and drivesnSTATUS low on all FPGAs, which causes them to enter a reset state. Thisbehavior is similar to a single FPGA detecting an error.If the Auto-Restart <strong>Configuration</strong> After Error option is turned on, thedevices will automatically initiate reconfiguration if an error occurs. TheFPGAs will release their nSTATUS pins after a reset time-out period(maximum of 40 µs). When all the nSTATUS pins are released and pulledhigh, the configuration device tries to reconfigure the chain. If the Auto-Restart <strong>Configuration</strong> After Error option is turned off, the external systemmust monitor nSTATUS for errors and then pulse nCONFIG low to restartconfiguration. The external system can pulse nCONFIG if nCONFIG isunder system control rather than tied to V CC .Enhanced configuration devices also support parallel configuration of upto eight devices. The n-bit (n = 1, 2, 4, or 8) PS configuration mode allowsenhanced configuration devices to concurrently configure FPGAs or achain of FPGAs. In addition, these devices do not have to be the samedevice family or density; they can be any combination of Altera FPGAs.An individual enhanced configuration device DATA line is available foreach targeted FPGA. Each DATA line can also feed a daisy chain of FPGAs.Figure 8–3 shows how to concurrently configure multi<strong>pl</strong>e devices usingan enhanced configuration device.Altera Corporation 8–11August 2005 <strong>Configuration</strong> <strong>Handbook</strong>, Volume 1

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