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Configuration Handbook - Kamami.pl

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Configuring Cyclone FPGAsnCONFIG, and DATA0) between the cable and the configuration devices.The last option is to remove the configuration devices from the boardwhen configuring with the cable. Figure 13–16 shows a combination of aconfiguration device and a ByteBlaster II, MasterBlaster, orByteBlasterMV cable to configure a Cyclone FPGA.Figure 13–16. Configuring with a Combined PS & <strong>Configuration</strong> Device Scheme10 kΩ10 kΩ(5)V CC (1)V CC (1)V CC (6)Cyclone FPGACONF_DONEMSEL0 nSTATUSMSEL1 DCLKnCEnCEO10 kΩN.C.V CC (1)V CC (1)V CC (1)10 kΩ10 kΩ(5)Download Cable10-Pin Male Header(PS Mode)Pin 1V CCVIO(2)GNDGNDDATA0nCONFIG(3) (3) (3)GND(3)(3)<strong>Configuration</strong> DeviceDCLKDATAOEnCSnINIT_CONF (4)Notes to Figure 13–16:(1) You should connect the pull-up resistor to the same sup<strong>pl</strong>y voltage as the configuration device.(2) Pin 6 of the header is a V IO reference voltage for the MasterBlaster output driver. V IO should match the targetdevice’s V CCIO . This is a no-connect pin for the ByteBlasterMV header.(3) You should not attempt configuration with a ByteBlaster II, MasterBlaster, or ByteBlasterMV cable while aconfiguration device is connected to a Cyclone FPGA. Instead, you should either remove the configuration devicefrom its socket when using the download cable or <strong>pl</strong>ace a switch on the five common signals between the downloadcable and the configuration device. Remove the ByteBlaster II, MasterBlaster, or ByteBlasterMV cable whenconfiguring with a configuration device.(4) If nINIT_CONF is not used, nCONFIG must be pulled to V CC either directly or through a resistor.(5) The pull-up resistors on DATA0 and DCLK are only needed if the download cable is the only configuration schemeused on your board. This is to ensure that DATA0 and DCLK are not left floating after configuration. For exam<strong>pl</strong>e, ifyou are also using a configuration device, the pull-up resistors on DATA0 and DCLK are not needed.(6) Connect MSEL0 to the V CC sup<strong>pl</strong>y voltage of the I/O bank it resides in.fFor more information on how to use the ByteBlaster II, MasterBlaster, orByteBlasterMV cables, see the following documents:■■■ByteBlaster II Parallel Port Download Cable Data SheetMasterBlaster Serial/USB Communications Cable Data SheetByteBlasterMV Parallel Port Download Cable Data SheetAltera Corporation 13–27January 2007 Cyclone Device <strong>Handbook</strong>, Volume 1

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