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Configuration Handbook - Kamami.pl

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Configuring Stratix II & Stratix II GX DevicesSerial configuration devices provide a serial interface to accessconfiguration data. During device configuration, Stratix II andStratix II GX devices read configuration data via the serial interface,decompress data if necessary, and configure their SRAM cells. Thisscheme is referred to as the AS configuration scheme because the devicecontrols the configuration interface. This scheme contrasts with the PSconfiguration scheme, where the configuration device controls theinterface.1 The Stratix II and Stratix II GX decompression and designsecurity features are fully available when configuring yourStratix II or Stratix II GX device using AS mode.Table 7–11 shows the MSEL pin settings when using the AS configurationscheme.Table 7–11. Stratix II & Stratix II GX MSEL Pin Settings for AS <strong>Configuration</strong>Schemes Note (2)<strong>Configuration</strong> SchemeMSEL3 MSEL2 MSEL1 MSEL0Fast AS (40 MHz) (1) 1 0 0 0Remote system upgrade fast AS (40 MHz) 1 0 0 1(1)AS (20 MHz) (1) 1 1 0 1Remote system upgrade AS (20 MHz) (1) 1 1 1 0Note to Table 7–11:(1) Only the EPCS16 and EPCS64 devices support a DCLK up to 40 MHz clock; otherEPCS devices support a DCLK up to 20 MHz. Refer to the Serial <strong>Configuration</strong>Devices Data Sheet for more information.(2) Note that AS mode is only ap<strong>pl</strong>icable for 3.3-V configuration. If I/O bank 3 is lessthan 3.3-V, level shifters are required on the output pins (DCLK,nCSO, andASDO) from the Stratix II or Stratix II GX device back to the EPCS device.Serial configuration devices have a four-pin interface: serial clock input(DCLK), serial data output (DATA), AS data input (ASDI), and anactive-low chip select (nCS). This four-pin interface connects to Stratix IIand Stratix II GX device pins, as shown in Figure 7–12.Altera Corporation 7–35May 2007 Stratix II Device <strong>Handbook</strong>, Volume 2

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