Configuration Handbook - Kamami.pl

Configuration Schemessend JTAG data to the device involve moving the TAP controller througheither the data register leg or the instruction register leg of the statemachine. For example, loading a JTAG instruction involves moving theTAP controller to the SHIFT_IR state and shifting the instruction into theinstruction register through the TDI pin. Next, the TAP controller ismoved to the RUN_TEST/IDLE state where a delay is implemented toallow the instruction time to be latched. This process is identical for dataregister scans, except that the data register leg of the state machine istraversed.The high-level Jam instructions are the DRSCAN instruction for scanningthe JTAG data register, the IRSCAN instruction for scanning theinstruction register, and the WAIT command that causes the state machineto sit idle for a specified period of time. Each leg of the TAP controller isscanned repeatedly, according to instructions in the .jbc file, until all ofthe target devices are programmed.Figure 13–23 shows the functional behavior of the Jam Player when itparses the .jbc file. When the Jam Player encounters a DRSCAN, IRSCAN,or WAIT instruction, it generates the proper data on TCK, TMS, and TDI tocomplete the instruction. The flow diagram shows branches for theDRSCAN, IRSCAN, and WAIT instructions. Although the Jam Playersupports other instructions, they are omitted from the flow diagram forsimplicity.13–40 Altera CorporationCyclone Device Handbook, Volume 1 January 2007