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Configuration Handbook - Kamami.pl

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Passive Serial & JTAGconfiguration device. The second download cable is used in PS mode toconfigure the FPGA using PS configuration. The MSEL pins should be setto select PS as the configuration mode.Figure 9–3. JTAG Programming of <strong>Configuration</strong> Device with PS <strong>Configuration</strong> of FPGA Using a <strong>Configuration</strong>Device & Download Cable(1) VCC1 kΩVCC (1)1 kΩDownload Cable(JTAG Mode)10-Pin Male HeaderVCCVCC (1) Download Cable(2) VCC (1)(PS Mode)10-Pin Male Header(2)VCC (1)(2)VCCVIOVIOFPGAGNDGNDnMSELGND1 kΩ(3)(3)(3)(3)<strong>Configuration</strong> DeviceDATADCLKOEnCSTMSTCKTDInINIT_CONFTDO(3)DCLKCONF_DONEnCONFIGnSTATUSDATA0nCEOnCEGNDN.C.Notes to Figure 9–3:(1) V CC should be connected to the same sup<strong>pl</strong>y voltage as the configuration device. For APEX 20KE devices, nCONFIGshould be pulled up to V CCINT .(2) If the internal pull-up resistors of the configuration device are used, external pull-up resistors should not be usedon these pins.(3) To configure the FPGA with a download cable, you should either remove the configuration device from its socketor <strong>pl</strong>ace a switch on the five common signals between the download cable and the configuration device.1 You should not attempt PS configuration with a download cablewhile a configuration device is connected to an FPGA.9–4 Altera Corporation<strong>Configuration</strong> <strong>Handbook</strong>, Volume 2 April 2007

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