Configuration Handbook - Kamami.pl

Altera Enhanced Configuration Devicesfrequency of the targeted SRAM device family while selecting the clockinput and divider settings. For DCLK timing specifications of SRAMbaseddevices, refer to the Configuration Handbook.Settings & GuidelinesEnhanced configuration devices can use either the internal oscillator oran external clock source to clock data into SRAM-based devices, as shownin Figure 3–13. The enhanced configuration device’s internal oscillatorruns at nominal speeds of 10, 33, 50, or 66 MHz. The minimum andmaximum speeds are shown in the Enhanced Configuration Device DataSheet. Additionally, the enhanced configuration device can accept anexternal clock source running at speeds of up to 100 MHz.Figure 3–13. Clock Divider Unit in Enhanced Configuration DevicesConfiguration DeviceClock Divider UnitExternal Clock(Up to 100 MHz)10 MHz33 MHz50 MHz66 MHzDivideby NDCLKInternal OscillatorSoftware ImplementationsYou can select the clock source and the clock speed in the ProgrammingObject File Options window with pof selected as the programming filetype (Convert Programming Files window), as shown in Figure 3–14. Youcan type the appropriate external clock frequency in theFrequency (MHz) drop-down menu, and select any value from thedivisor list regardless of the clock source setting.Altera Corporation 3–19April 2007 Configuration Handbook, Volume 2