Configuration Handbook - Kamami.pl

Configuring Stratix III DevicesTable 11–15. Dedicated Configuration Pins on the Stratix III Device (Part 7 of 7)Pin Name User Mode ConfigurationSchemePin TypeDescriptionDATA0 I/O PS, FPP, AS Input Data input. In serial configuration modes,bit-wide configuration data is presented to thetarget device on the DATA0 pin.In AS mode, DATA0 has an internal pull-upresistor that is always active.After configuration, DATA0 is available as auser I/O pin and the state of this pin dependson the Dual-Purpose Pin settings.DATA[7..1] I/O Parallelconfigurationschemes(FPP)InputsAfter configuration, enhanced configurationdevices drive this pin high.Data inputs. Byte-wide configuration data ispresented to the target device onDATA[7..0].In serial configuration schemes, they functionas user I/O pins during configuration, whichmeans they are tri-stated.After FPP configuration, DATA[7..1] areavailable as user I/O pins and the state ofthese pin depends on the Dual-Purpose Pinsettings.Table 11–16 describes the optional configuration pins. If these optionalconfiguration pins are not enabled in the Quartus II software, they areavailable as general-purpose user I/O pins. Therefore, duringconfiguration, these pins function as user I/O pins and are tri-stated withweak pull-up resistors.Altera Corporation 11–81May 2007 Stratix III Device Handbook, Volume 1