Configuration Handbook - Kamami.pl

Configuring Stratix II & Stratix II GX DevicesFigure 7–8. Single Device FPP Configuration Using an Enhanced ConfigurationDeviceStratix II DeviceMSEL[3..0]DCLKDATA[7..0]nSTATUSCONF_DONEnCONFIGnCEOnCEV CC (1) V CC (1)10 kΩ (3) (3) 10 kΩN.C.EnhancedConfigurationDeviceDCLKDATA[7..0]OE (3)nCS (3)nINIT_CONF (2)GNDGNDNotes to Figure 7–8:(1) The pull-up resistor should be connected to the same supply voltage as theconfiguration device.(2) The nINIT_CONF pin is available on enhanced configuration devices and has aninternal pull-up resistor that is always active. This means an external pull-upresistor should not be used on the nINIT_CONF-nCONFIG line. The nINIT_CONFpin does not need to be connected if its functionality is not used. If nINIT_CONFis not used, nCONFIG must be pulled to V CC either directly or through a resistor.(3) The enhanced configuration devices’ OE and nCS pins have internalprogrammable pull-up resistors. If internal pull-up resistors are used, externalpull-up resistors should not be used on these pins. The internal pull-up resistorsare used by default in the Quartus II software. To turn off the internal pull-upresistors, check the Disable nCS and OE pull-ups on configuration device optionwhen generating programming files.fThe value of the internal pull-up resistors on the enhanced configurationdevices can be found in the Enhanced Configuration Devices (EPC4, EPC8,& EPC16) Data Sheet.When using enhanced configuration devices, you can connect thedevice’s nCONFIG pin to nINIT_CONF pin of the enhanced configurationdevice, which allows the INIT_CONF JTAG instruction to initiate deviceconfiguration. The nINIT_CONF pin does not need to be connected if itsfunctionality is not used. If nINIT_CONF is not used, nCONFIG must bepulled to V CC either directly or through a resistor. An internal pull-upresistor on the nINIT_CONF pin is always active in the enhancedconfiguration devices, which means an external pull-up resistor shouldnot be used if nCONFIG is tied to nINIT_CONF.Upon power-up, the Stratix II or Stratix II GX device goes through a POR.The POR delay is dependent on the PORSEL pin setting; when PORSEL isdriven low, the POR time is approximately 100 ms, if PORSEL is drivenhigh, the POR time is approximately 12 ms. During POR, the device willreset, hold nSTATUS low, and tri-state all user I/O pins. TheAltera Corporation 7–27May 2007 Stratix II Device Handbook, Volume 2