Configuration Handbook - Kamami.pl

Passive Serial ConfigurationFigure 7–8. APEX 20KE & APEX 20KC PS Configuration Using a Configuration Device Timing WaveformnINIT_CONF or VCC/nCONFIGOE/nSTATUSnCS/CONF_DONEDCLKDATAt PORt CHt DSU t CLt OEZXD D D D0 1 2 3 D nUser I/OINIT_DONEt DHt COTri-StateTri-StateUser ModeNote to Figure 7–8:(1) APEX 20KE and APEX 20KC devices enter user-mode 40 clock cycles after CONF_DONE goes high. The initializationclock can come from the APEX 20KE or APEX 20KC internal oscillator or the CLKUSR pin.(1)ffFor timing information, refer to the Enhanced Configuration Devices(EPC4, EPC8, and EPC16) Data Sheet or the Configuration Devices forSRAM-based LUT Devices Data Sheet in the Configuration Handbook.Device configuration options and how to create configuration files arediscussed further in Software Settings, chapter 6 and 7 in volume 2 of theConfiguration Handbook.PS Configuration Using a MicroprocessorIn the PS configuration scheme, an intelligent host (e.g., a microprocessoror CPLD) can transfer configuration data from a storage device (e.g., flashmemory) to the target APEX 20KE and APEX 20KC devices.Configuration data can be stored in RBF, HEX, or TTF format. Figure 7–9shows the configuration interface connections between the APEX 20KE orAPEX 20KC device and a microprocessor for single device configuration.7–20 Altera CorporationConfiguration Handbook, Volume 1 August 2005