Configuration Handbook - Kamami.pl

Configuring Stratix & Stratix GX DevicesPORSEL PinsPORSEL is a dedicated input pin used to select POR delay times of 2 msor 100 ms during power-up. When the PORSEL pin is connected toground, the POR time is 100 ms; when the PORSEL pin is connected toVCC, the POR time is 2 ms. There is an internal 2.5-kΩ pull-down resistoron PORSEL. Therefore if you are using a pull-up resistor to pull up thissignal, you need to use a 1-kΩ resistor.When using enhanced configuration devices to configure Stratix devices,make sure that the PORSEL setting of the Stratix device is the same orfaster than the PORSEL setting of the enhanced configuration device. Ifthe FPGA is not powered up after the enhanced configuration device exitsPOR, the CONF_DONE signal will be high since the pull-up resistor ispulling this signal high. When the enhanced configuration device exitsPOR, OE of the enhanced configuration device is released and pulledhigh by a pull-up resistor. Since the enhanced configuration device seesits nCS/CONF_DONE signal also high, it enters a test mode. Therefore, youmust ensure the FPGA powers up before the enhanced configurationdevice exits POR.For more margin, the 100-ms setting can be selected when using anenhanced configuration device to allow the Stratix FPGA to power-upbefore configuration is attempted (see Table 11–4).Table 11–4. PORSEL SettingsPORSEL SettingsPOR Time (ms)GND 100V CC 2nIO_PULLUP PinsThe nIO_PULLUP pin enables a built-in weak pull-up resistor to pull alluser I/O pins to VCCIO before and during device configuration. IfnIO_PULLUP is connected to V CC during configuration, the weak pullupson all user I/O pins and all dual-purpose pins are disabled. Ifconnected to ground, the pull-ups are enabled during configuration. ThenIO_PULLUP pin can be pulled to 1.5, 1.8, 2.5, or 3.3-V for a logic levelhigh. There is an internal 2.5-kΩ pull-down resistor on nIO_PULLUP.Therefore, if you are using a pull-up resistor to pull up this signal, youneed to use a 1-kΩ resistor.Altera Corporation 11–5July 2005 Stratix Device Handbook, Volume 2