Configuration Handbook - Kamami.pl

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Altera Enhanced Configuration DevicesFigure 3–2. Daisy Chaining Two SRAM-Based Devices to One DATA LineDesign GuidelinesFor debugging, Altera recommends keeping the control lines such asnSTATUS, nCONFIG, and CONF_DONE between each PLD and theconfiguration device separate. You can keep control lines separate byusing a switch to manage which control signals are fed back into theenhanced configuration device. Figure 3–3 shows an example of theconnections between the enhanced configuration device and the targetedPLDs.Altera Corporation 3–5April 2007 Configuration Handbook, Volume 2
Dynamic Configuration (Page Mode) Implementation OverviewFigure 3–3. Example of Using Debugging Switches for Control LinesPLDDCLKDATA0nSTATUSCONF_DONEnCONFIGDCLKDATA0OEnCSConfigurationDevicenINIT_CONFPORSELPLDDCLKDATA0nSTATUSCONF_DONEnCONFIGPGM[2..0]DATA1DynamicConfiguration(Page Mode)ImplementationOverviewPages in enhanced configuration devices allow you to organize and storevarious configurations for entire systems that use one or more AlteraPLDs. This dynamic configuration (or page mode) feature allows systemsto dynamically reconfigure their PLDs with different configuration files.You can use different pages to store configuration files that supportdifferent standards (for example, I/O standards, memory). Alternatively,the different pages can place the system in different modes. For instance,page 0 could contain a configuration file (.sof) for the PLD that onlyprocesses data packets; page 1 could contain a configuration file for thesame PLD that processes data and voice packets.With the ability to dynamically switch pages, you can also configureAltera devices with various revisions for debugging without having toreprogram the configuration device. For example, you can configure adevice that is on “stand-by” to perform another function and thenreconfigure it back with the original configuration file.A page is a section of the flash memory space that contains configurationdata for all PLDs in the system. One page stores one system configurationregardless of the number of PLDs in the system. The size of each page isdynamic and can change each time the enhanced configuration device isreprogrammed. Enhanced configuration devices support a maximum ofeight pages of configuration data, or eight system configurations. Thenumber of pages is also limited to the density of the configuration device.3–6 Altera CorporationConfiguration Handbook, Volume 2 April 2007
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Configuration HandbookPreliminary I
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ContentsVolume I...................
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Altera FPGAsPreliminary Information
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IntroductionAll configuration schem
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Device Configuration Overview for P
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Selecting a Configuration SchemeSel
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Selecting a Configuration SchemePas
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IntroductionfFor information on enh
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Configuration FeaturesUse the data
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Configuration FeaturesStratix III d
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Configuration Features5. Select Add
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Configuration FeaturesV CCPGM PinsS
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Fast Passive Parallel Configuration
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Fast Active Serial Configuration (S
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Passive Serial ConfigurationPS Conf
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Passive Serial ConfigurationAn opti
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Passive Serial ConfigurationDCLK, D
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Passive Serial ConfigurationFigure
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Passive Serial Configuration1 To be
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Passive Serial Configuration1 If yo
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Passive Serial ConfigurationThe enh
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Passive Serial ConfigurationThe Qua
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Passive Serial Configuration1 You c
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Passive Serial Configurationoption
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Passive Serial ConfigurationIf you
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JTAG ConfigurationJTAGConfiguration
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JTAG ConfigurationFigure 11-29. JTA
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JTAG ConfigurationTable 11-13. Dedi
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JTAG ConfigurationAfter the first d
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Device Configuration PinsTable 11-1
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ConclusionConclusionDocumentRevisio
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Introduction1 For more information
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Configuration FeaturesTable 7-3. St
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Configuration Features1 When using
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Configuration Features6. Select the
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Configuration FeaturesV CCPD PinsSt
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Configuration Featuresthan 00X0 (MS
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Active Serial Configuration (Serial
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Passive Serial ConfigurationTable 7
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Passive Serial ConfigurationfThe va
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Passive Serial Configurationpulled
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Passive Serial ConfigurationIf the
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Passive Serial Configurationsoftwar
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Passive Serial Configurationconfigu
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Passive Serial ConfigurationUpon po
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Passive Serial ConfigurationIn addi
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Passive Parallel Asynchronous Confi
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JTAG ConfigurationJTAGConfiguration
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JTAG ConfigurationFigure 7-35. JTAG
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JTAG ConfigurationTable 7-20. Dedic
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JTAG ConfigurationAfter the first d
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Device Configuration PinsDeviceConf
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ConclusionConclusionDocumentRevisio
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Device Configuration Overview■The
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Device Configuration Overviewrelate
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Configuration File SizeTDO & nCEO P
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Configuration SchemesPS Configurati
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Configuration SchemesFigure 11-2. S
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Configuration SchemesRestart Config
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Configuration SchemesTable 11-7 sho
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Configuration SchemesFigure 11-6. M
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Configuration SchemesTable 11-8. PS
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Configuration SchemesFPP Configurat
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Configuration SchemesDo not drive C
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Configuration Schemesdefault, the I
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Configuration SchemesFigure 11-13.
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Configuration SchemesTable 11-9. FP
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Configuration Schemesbe monitored,
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Configuration SchemesPPA Configurat
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Configuration SchemesTable 11-10 de
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Configuration SchemesDuring JTAG co
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Configuration SchemesJTAG-chain dev
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Configuration SchemesfFor more info
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Configuration SchemesProgram FlowTh
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Configuration Schemessend JTAG data
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Configuration SchemesTable 11-14. R
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Cyclone II Configuration OverviewTa
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Configuration Data CompressionAltho
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PS ConfigurationPS ConfigurationYou
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PS ConfigurationConfiguration Stage
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PS Configurationdevice also pulls n
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PS ConfigurationYou must connect al
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PS ConfigurationPS Configuration Ti
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PS ConfigurationfAll information in
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PS ConfigurationUpon power-up, the
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PS ConfigurationnCONFIG is low and
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PS ConfigurationFigure 13-14. Multi
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PS ConfigurationnCONFIG low for at
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PS ConfigurationDATA3, you can leav
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PS ConfigurationPS Configuration Us
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PS ConfigurationIn addition, becaus
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PS Configurationthe five common sig
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JTAG ConfigurationA device operatin
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JTAG Configurationenables the progr
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JTAG ConfigurationFigure 13-23. JTA
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JTAG Configuration1 The Quartus II
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JTAG Configurationfeature. To use t
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Device Configuration PinsReconfigur
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ConclusionTable 13-13 describes the
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Document Revision HistoryDocumentRe
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Device Configuration OverviewYou ca
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Data CompressionWhen you enable com
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Data CompressionCompression can als
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Configuration SchemesConfigurationS
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Configuration Schemesinternal oscil
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Configuration SchemesFigure 13-6. C
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Configuration SchemesFigure 13-7. C
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Configuration SchemesASDI and nCS s
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Configuration SchemesFigure 13-18 s
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Configuration Schemesattempt JTAG c
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Configuration Schemes1 If V CCIO is
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Configuration Schemes1 Both JTAG co
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Configuration Schemessend JTAG data
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Configuration SchemesTable 13-9. Re
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Document Revision History13-52 Alte
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Passive Serial Configurationinterna
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Passive Serial ConfigurationHandsha
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JTAG ConfigurationTable 6-6. PPA Ti
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JTAG ConfigurationDuring JTAG confi
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JTAG ConfigurationFigure 6-30. JTAG
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Device Configuration PinsfFor more
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Device Configuration PinsTable 6-9.
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Device Configuration PinsJTAG pins
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IntroductionTable 7-2 shows the app
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Passive Serial Configuration1 V CCI
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Passive Serial ConfigurationWhen CO
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Passive Serial ConfigurationYou can
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Passive Serial ConfigurationYou can
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Passive Parallel Synchronous Config
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APEX 20KE Power SequencingThese gui
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APEX 20KE Power SequencingUse these
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APEX 20KE Power Sequencing7-70 Alte
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Introductionsuccessfully. Toggling
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Passive Serial ConfigurationThe fol
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JTAG ConfigurationMercury, APEX 20K
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JTAG ConfigurationOther Altera devi
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Device Configuration Pins8-70 Alter
Page 597 and 598: FPGA Configuration DevicesPrelimina
Page 599 and 600: Choosing a Configuration DevicefFor
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Page 607 and 608: Functional Description■■■■
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Page 615 and 616: Functional DescriptionThe configura
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Generating Configuration FilesYou c
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SRAM Object File (.sof)6. Click on
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Tabular Text File (.ttf)Tabular Tex
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8. Configuring Mixed AlteraFPGA Cha
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Configuring Mixed Altera FPGA Chain
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9. Combining DifferentConfiguration
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Combining Different Configuration S
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10. Using Flash Memory toConfigure
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Using Flash Memory to Configure FPG
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Debugging Suggestions■■To check
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Debugging SuggestionsUsing JTAG Con
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Document Revision History11-8 Alter
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