Configuration Handbook - Kamami.pl

Passive Parallel Asynchronous Configurationthe FPGA also pulls nSTATUS and CONF_DONE low and all I/O pins aretri-stated. Once nCONFIG returns to a logic high state and nSTATUS isreleased by the FPGA, reconfiguration begins.Figure 8–21 shows how to configure multiple Mercury, APEX 20K (2.5 V),ACEX 1K, and FLEX 10K devices using a microprocessor. This circuit issimilar to the PPA configuration circuit for a single device, except thedevices are cascaded for multi-device configuration.Figure 8–21. Multi-Device PPA Configuration Using a MicroprocessorV CC (2)(2) V CC1 kΩV CC (2)1 kΩAddress Decoder1 k ΩADDRMemoryADDR DATA[7..0]V CC (2)1 kΩMicroprocessorMercury, APEX 20K (2.5-V),ACEX 1K or FLEX 10K Device 1DATA[7..0] nCEnCS (1)CS (1)GNDCONF_DONE DCLKnSTATUSnCEOnWSnRSnCONFIGRDYnBSYMSEL1MSEL0V CCMercury, APEX 20K (2.5-V),ACEX 1K or FLEX 10K Device 2DATA[7..0]DCLKnCS (1)CS (1)CONF_DONEnSTATUSnCEnCEOnWSnRSnCONFIG MSEL1RDYnBSY MSEL0N.C.V CCNotes to Figure 8–21:(1) If not used, the CS pin can be connected to V CC directly. If not used, the nCS pin can be connected to GND directly.(2) The pull-up resistor should be connected to a supply that provides an acceptable input signal for all devices in thechain.In multi-device PPA configuration the first device’s nCE pin is connectedto GND while its nCEO pin is connected to nCE of the next device in thechain. The last device’s nCE input comes from the previous device, whileits nCEO pin is left floating. After the first device completes configurationin a multi-device configuration chain, its nCEO pin drives low to activatethe second device’s nCE pin, which prompts the second device to begin8–50 Altera CorporationConfiguration Handbook, Volume 1 August 2005