Configuration Handbook - Kamami.pl

Configuring Stratix III DevicesfYou can find the value of the internal pull-up resistors on enhancedconfiguration devices in the Operating Conditions table of the EnhancedConfiguration Devices (EPC4, EPC8, and EPC16) Data Sheet.When using enhanced configuration devices, you can connect nCONFIGof the device to nINIT_CONF of the configuration device, which allowsthe INIT_CONF JTAG instruction to initiate device configuration. You donot need to connect the nINIT_CONF pin if its functionality is not used.An internal pull-up resistor on the nINIT_CONF pin is always active inthe enhanced configuration devices, which means you should not use anexternal pull-up resistor if nCONFIG is tied to nINIT_CONF.Upon power-up, the Stratix III devices go through a POR. The POR delayis dependent on the PORSEL pin setting. When PORSEL is driven low, thePOR time is approximately 100 ms. If PORSEL is driven high, the PORtime is approximately 12 ms. During POR, the device will reset, holdnSTATUS low, and tri-state all user I/O pins. The configuration devicealso goes through a POR delay to allow the power supply to stabilize. Youcan set the POR time for enhanced configuration devices to either 100 msor 2 ms, depending on its PORSEL pin setting. If the PORSEL pin isconnected to GND, the POR delay is 100 ms. If the PORSEL pin isconnected to V CC , the POR delay is 2 ms. During this time, theconfiguration device drives its OE pin low. This low signal delaysconfiguration because the OE pin is connected to the target device'snSTATUS pin.1 When selecting a POR time, you need to ensure that the devicecompletes power-up before the enhanced configuration deviceexits POR. Altera recommends that you choose a POR time forthe Stratix III device of 12 ms, while selecting a POR time for theenhanced configuration device of 100 ms.When both devices complete POR, they release their open-drain OE ornSTATUS pin, which is then pulled high by a pull-up resistor. Once thedevice successfully exits POR, all user I/O pins continue to be tri-stated.If nIO_pullup is driven low during power-up and configuration, theuser I/O pins and dual-purpose I/O pins will have weak pull-upresistors which are on (after POR) before and during configuration. IfnIO_pullup is driven high, the weak pull-up resistors are disabled.When the power supplies have reached the appropriate operatingvoltages, the target device senses the low-to-high transition on nCONFIGand initiates the configuration cycle. The configuration cycle consists ofthree stages: reset, configuration, and initialization. While nCONFIG ornSTATUS are low, the device is in reset. You can delay the beginning ofconfiguration by holding the nCONFIG or nSTATUS pin low.Altera Corporation 11–51May 2007 Stratix III Device Handbook, Volume 1