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Configuration Handbook - Kamami.pl

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Passive Serial <strong>Configuration</strong>software from the General tab of the Device & Pin Options dialog box.Sup<strong>pl</strong>ying a clock on CLKUSR will not affect the configuration process.After all configuration data has been accepted and CONF_DONE goes high,CLKUSR will be enabled after the time specified as t CD2CU . After this timeperiod elapses, the Stratix II and Stratix II GX devices require 299 clockcycles to initialize properly and enter user mode. Stratix II andStratix II GX devices support a CLKUSR f MAX of 100 MHz.An optional INIT_DONE pin is available, which signals the end ofinitialization and the start of user-mode with a low-to-high transition.The Enable INIT_DONE Output option is available in the Quartus IIsoftware from the General tab of the Device & Pin Options dialog box.If you are using the INIT_DONE pin, it will be high due to an external10-kΩ pull-up resistor when nCONFIG is low and during the beginning ofconfiguration. Once the option bit to enable INIT_DONE is programmedinto the device (during the first frame of configuration data), theINIT_DONE pin goes low. When initialization is com<strong>pl</strong>ete, theINIT_DONE pin is released and pulled high. This low-to-high transitionsignals that the device has entered user mode. In user-mode, the user I/Opins will no longer have weak pull-up resistors and will function asassigned in your design. Enhanced configuration devices and EPC2devices drive DCLK low and DATA0 high at the end of configuration.If an error occurs during configuration, the device drives its nSTATUS pinlow, resetting itself internally. Since the nSTATUS pin is tied to OE, theconfiguration device will also be reset. If the Auto-restart configurationafter error option, available in the Quartus II software, from the Generaltab of the Device & Pin Options dialog box is turned on, the deviceautomatically initiates reconfiguration if an error occurs. The Stratix IIand Stratix II GX devices release the nSTATUS pin after a reset time-outperiod (maximum of 100 µs). When the nSTATUS pin is released andpulled high by a pull-up resistor, the configuration device reconfiguresthe chain. If this option is turned off, the external system must monitornSTATUS for errors and then pulse nCONFIG low for at least 2 µs to restartconfiguration. The external system can pulse nCONFIG if nCONFIG isunder system control rather than tied to V CC .In addition, if the configuration device sends all of its data and thendetects that CONF_DONE has not gone high, it recognizes that the devicehas not configured successfully. Enhanced configuration devices wait for64 DCLK cycles after the last configuration bit was sent for CONF_DONE toreach a high state. EPC2 devices wait for 16 DCLK cycles. In this case, theconfiguration device pulls its OE pin low, driving the target device’snSTATUS pin low. If the Auto-restart configuration after error option isset in the software, the target device resets and then releases its nSTATUS7–58 Altera CorporationStratix II Device <strong>Handbook</strong>, Volume 2 May 2007

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