Configuration Handbook - Kamami.pl

Configuration SchemesTable 11–8. PS Timing Parameters for Stratix & Stratix GX DevicesSymbol Parameter Min Max Unitst CF2CD nCONFIG low to CONF_DONE low 800 nst CF2ST0 nCONFIG low to nSTATUS low 800 nst CF2ST1 nCONFIG high to nSTATUS high 40 (2) µst CFG nCONFIG low pulse width 40 µst STATUS nSTATUS low pulse width 10 40 (2) µst CF2CK nCONFIG high to first rising edge on DCLK 40 µst ST2CK nSTATUS high to first rising edge on DCLK 1 µst DSU Data setup time before rising edge on DCLK 7 nst DH Data hold time after rising edge on DCLK 0 nst CH DCLK high time 4 nst CL DCLK low time 4 nst CLK DCLK period 10 nsf MAX DCLK maximum frequency 100 MHzt CD2UM CONF_DONE high to user mode (1) 6 20 µsNotes to Table 11–8:(1) The minimum and maximum numbers apply only if the internal oscillator is chosen as the clock source for startingup the device. If the clock source is CLKUSR, multiply the clock period by 136 to obtain this value.(2) This value is obtainable if users do not delay configuration by extending the nSTATUS low pulse width.11–20 Altera CorporationStratix Device Handbook, Volume 2 July 2005