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Configuration Handbook - Kamami.pl

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Configuring Cyclone II DevicesFigure 13–4. Multi<strong>pl</strong>e Device AS <strong>Configuration</strong>(1) V CC (1) V CC (1)10 kΩ10 kΩ10 kΩSerial <strong>Configuration</strong>DeviceCyclone II FPGAMaster DevicenSTATUSCONF_DONECyclone II FPGASlave DevicenSTATUSCONF_DONEnCEOnCEV CCnCONFIG nCONFIGV CC (2)10 kΩN.C. (3)nCEOnCEDATADCLKnCSASDIGNDDATA0DCLKnCSOASDOMSEL1MSEL0V CCGNDDATA0DCLKMSEL1MSEL0V CCGNDNotes to Figure 13–4:(1) Connect the pull-up resistors to a 3.3-V sup<strong>pl</strong>y.(2) Connect the pull-up resistor to the V CCIO sup<strong>pl</strong>y voltage of I/O bank that the nCEO pin resides in.(3) The nCEO pin can be left unconnected or used as a user I/O pin when it does not feed another device’s nCE pin.As shown in Figure 13–4, the nSTATUS and CONF_DONE pins on all targetFPGAs are connected together with external pull-up resistors. These pinsare open-drain bidirectional pins on the FPGAs. When the first deviceasserts nCEO (after receiving all of its configuration data), it releases itsCONF_DONE pin. However, the subsequent devices in the chain keep theCONF_DONE signal low until they receive their configuration data. Whenall the target FPGAs in the chain have received their configuration dataand have released CONF_DONE, the pull-up resistor pulls this signal high,and all devices simultaneously enter initialization mode.Altera Corporation 13–13February 2007 Cyclone II Device <strong>Handbook</strong>, Volume 1

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