Configuration Handbook - Kamami.pl

Configuring Cyclone FPGAsCombiningConfigurationSchemesThis section shows you how to configure Cyclone FPGAs using multipleconfiguration schemes on the same board.Active Serial & JTAGYou can combine the AS configuration scheme with JTAG-basedconfiguration. Set the MSEL[1..0] pins to 00 in this setup, as shown inFigure 13–25. This setup uses two 10-pin download cable headers on theboard. The first header programs the serial configuration device insystemvia the AS programming interface, and the second headerconfigures the Cyclone FPGA directly via the JTAG interface.If you try configuring the device using both schemes simultaneously,JTAG configuration takes precedence and AS configuration is terminated.Figure 13–25. Combining AS & JTAG Configuration(1) V CC V CC (1) V CC (1)10 kΩ10 kΩ10 kΩSerial ConfigurationDeviceDATADCLKnCSASDI10 kΩGNDCyclone FPGAnSTATUSCONF_DONE nCEOnCONFIGnCEMSEL1MSEL0DATA TCKDCLK TDOnCSO TMSASDOTDIV CCN.C.10 kΩGNDV CC10 kΩDownload Cable(JTAG Mode)10-Pin Male Header (top View)Pin 1V CCPin 1V CC (1)V IO1 kΩDownload Cable(AS Mode)10-Pin Male HeaderGNDNote to Figure 13–25:(1) Connect these pull-up resistors to 3.3 V.Altera Corporation 13–45January 2007 Cyclone Device Handbook, Volume 1